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82575 Ethernet Controller Design Guide
38
A low capacitance, high impedance probe (C < 1 pF, R > 500 KΩ) should be used for
testing. Probing the parameters can affect the measurement of the clock amplitude and
cause errors in the adjustment. A test should also be done after the probe has been
removed for circuit operation.
If jitter performance is poor, a lower jitter clock oscillator can be implemented.
Figure 10. Reference Oscillator Circuit
Figure 11. External Clock Oscillator Connectivity
External
Cloc
k
Oscillato
r
V
DD
=3.3
V
1.2
V
0
82575
V
GG
=0.6
V
R
pa
r
=100M
Ω
C
pa
r
=20pF
C
coupling
=10pF
xi
XTAL1
xo
XTAL2
N
C
1.2v
0