Intel 317698-001 Switch User Manual


 
49
82575 Ethernet Controller Design Guide
where the traces enter or exit the magnetics, the RJ-45 connector, and the
Ethernet silicon.
6. Use of a low-quality magnetics module.
7. Re-use of an out-of-date physical layer schematic in a Ethernet silicon design. The
terminations and decoupling can be different from one PHY to another.
8. Incorrect differential trace impedances. It is important to have ~100 W impedance
between the two traces within a differential pair. This becomes even more
important as the differential traces become longer. To calculate differential
impedance, many impedance calculators only multiply the single-ended impedance
by two. This does not take into account edge-to-edge capacitive coupling between
the two traces. When the two traces within a differential pair are kept close to each
other, the edge coupling can lower the effective differential impedance by 5 W to 20
W. Short traces will have fewer problems if the differential impedance is slightly off
target.