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82575 Ethernet Controller Design Guide
26
is complete, the driver must read the PHY registers to determine the resolved flow
control behavior of the link and reflect these in the MAC register settings (CTRL.TFCE
and CTRL.RFCE).
Note: Once PHY Auto-negotiation is complete, the PHY will assert a link indication (LINK) to
the MAC. Software must have set the "Set Link Up" bit in the Device Control Register
(CTRL.SLU) before the MAC recognizes the LINK indication from the PHY and can
consider the link to be up.
3.7 Copper/Fiber Switch
The 82575 Ethernet Controller provides significant amount of flexibility in pairing a LAN
device with a particular type of media (copper or fiber-optic) as well as the specific
transceiver/interface used to communicate with the media. Each MAC, representing a
distinct LAN device, can be coupled with an internal copper PHY (the default) or
SERDES interface independently. The link configuration specified for each LAN device
may be specified in the LINK_MODE field of the Extended Device Control Register
(CTRL_EXT) and initialized from the EEPROM Initialization Control Word 3 associated
with each LAN device.
In some applications, the software may need to be aware of the presence of a link on
the connection not currently active. In order to supply such an indication, any of the
the 82575 Ethernet Controller ports may set the AUTOSENSE_EN bit in the CONNSW
register (address 0x00034) in order to enable sensing of the non-active connection
activity. When in SerDes detect mode, the software should define which indication is
used to detect the energy change in SerDes/SGMII mode. It can be either the external
signal detect pin or the internal signal detect. This is done using the
CONNSW.ENRGSRC bit.
The software can then enable the OMED interrupt in ICR in order to get an indication of
any detection of energy in the non active connection.
The following procedure should be followed in order to enable the auto-sense mode:
SerDes-Detect Mode (PHY is active)
• Set CONNSW.ENRGSRC to determine the sources for the signal detect indication
(1- external SIG_DET, 0- internal SerDes electrical idle). The default of this bit is
set by EEPROM.
• Set CONNSW.AUTOSENSE_EN.
• When signal is detected on the SerDes link, the 82575 Ethernet Controller will set
the interrupt bit OMED in ICR and, if enabled, issue an interrupt. The
CONNSW.AUTOSENSE_EN will be cleared unless CONNSW.ASCLR_DIS is set. In
such a case, the host driver is responsible for the clearing of the AUTOSENSE_EN
bit.
PHY-Detect Mode
• Set CONNSW.AUTOSENSE_CONF = 1.
• Reset the PHY by assertion and de-assertion of CTRL.PHY_RST.
• Wait until EEMNGCTL.CFG_DONE is set.
• Enter the PHY to Link-Disconnect mode by setting why-reg25.5 via MDIC register.
• Set CONNSW.AUTOSENSE_EN = 1 and clear CONNSW.AUTOSENSE_CONF.
• When signal is detected on the PHY link, the hardware will set the interrupt bit
OMED in ICR and, if enabled, issue an interrupt.