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Hardware overview 21
Model 6511RC User Manual 1 • Introduction
The Model 6511 communicates with the other blades installed and operating in the same segment over the
H.110 TDM and PICMG 2.16 packet busses residing in the chassis mid-plane.
Matrix Switch functionality
The Model 6511 provides the following functionality:
• TDM mapping and aggregation—The Model 6511RC Matrix Switch concentrates the traffic capacity of
up to 63 E1 lines for delivery on a 155.54 Mbps optical or electrical STM-1 uplink (see section “TDM
mapping and aggregation” for details)
• TDM bus architecture—The Matrix Switch provides an interface to the H.110 bus within the ForeFront
chassis.The total capacity of the H.110 bus is 4096 half-duplex DS0 channels, the equivalent of 64 E1 lines
(see section “TDM bus architecture” for details)
• STM-1 link architecture—The 155.52 Mbps STM-1 uplink carries 2016 full-duplex (4032 half-duplex)
DS0 channels organized into 63 E1 signal streams. Each E1 stream carries 32 full-duplex DS0 channels (64
half-duplex timeslots). The total capacity of the STM-1 uplink on the Model 6511RC is 2016 full-duplex
DS0s, the equivalent of 63 E1 lines (see section “STM-1 link architecture” on page 22 for details)
• Matrix Switch TDM capacity—The Matrix Switch provides the means for you to map any DS0 on the
H.110 TDM bus to any DS0 on the STM-1 trunk and vice-versa (see section “Matrix Switch TDM capac-
ity” on page 23 for details)
TDM mapping and aggregation
The Model 6511RC Matrix Switch concentrates the traffic capacity of up to 63 E1 lines for delivery on a
155.54 Mbps optical or electrical STM-1 uplink. For E1 traffic aggregation, the Matrix Switch performs mul-
tiplexing and demultiplexing for all 63 E1 lines comprising the 155.52 Mbps STM-1 uplink. Each E1 line
comprises 32 DS0 timeslots. Each timeslot comprises a 64 kbps communication channel, or DS0. The Model
6511RC delivers a fully non-blocking switching matrix to the ForeFront system, providing any-to-any map-
ping between all 4096 half-duplex DS0 timeslots carried in the H.110 bus and all 4032 half-duplex DS0
timeslots in the SDH STM-1 uplink.