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STP2002QFP
Sun Microelectronics
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
7.5.11 ETX Transmit Data Pointer
This 32-bit register points to the next DVMA read burst address. Its contents
is the sum of the transmit data buffer base address and the transmit data buffer
displacement.
7.5.12 ETX TxFIFO Packet Counter
This eight-bit up/down counter keeps track of the number of frames that cur-
rently reside in the TxFIFO. The counter increments when a frame is loaded
into the FIFO, and decrements when a frame has been transferred to the
TX_MAC. This counter is used to enable frame transfer from the TxFIFO to
the TX_MAC.
Table 107: ETX Transmit Data Buffer Displacement Register Definition
Field Bits Description Type
Transmit data buffer
displacement
9:0 10-bit counter, keeps track of the next
DVMA read burst address
R
Table 108: ETX Transmit Data Pointer Register Address
Register Physical Address Access Size
ETX transmit pointer register 0x8C0_2030 4 bytes
Table 109: ETX Transmit Data Pointer Register Definition
Field Bits Description Type
Transmit data pointer 31:0 Points to next DVMA read burst address.
Value is the sum of
Data_Buffer_Base_Address and
Data_Buffer_Displacement
R
Table 110: ETX TxFIFO Packet Counter Register Address
Register Physical Address Access Size
ETX TxFIFO packet counter register 0x8C0_2024 4 bytes