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STP2002QFP
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
Sun Microsystems,
5.2.2.2 Management Interface Function (MIF)
The management interface block implements the management portion of the
MII interface to an external transceiver, as defined in the IEEE 802.3 MII
specification.
It allows the host to program and collect status information from two
external transceivers connected to the MII. The MIF supports three modes of
operation.
Bit-Bang Mode
The Bit-Bang mode of operation provides maximum flexibility with mini-
mum hardware support for the serial communication protocol between the
host and the transceivers. The actual protocol is implemented in software, and
the interaction with the hardware is done via three one-bit registers: data,
clock, and output_enable. Each read/write operation on a transceiver register
would require approximately 150 software instructions by the host.
Frame Mode
This mode of operation provides a much more efficient way of communica-
tion between the host and the transceivers. The serial communication proto-
col between the host and the transceivers is implemented in hardware, and the
interaction with the software is done via one 32-bit register (frame register).
When the software wants to execute a read/write operation on a transceiver
register, all it has to do is load the frame register with a valid instruction
(frame), and poll the valid bit for completion. The hardware will detect the
instruction, serialize the data, execute the serial protocol on the MII manage-
ment interface and set the valid bit to the software.
Polling Mode
As defined in the IEEE 802.3u MII standard, a transceiver shall implement at
least one status register that will contain a defined set of essential information
needed for basic network management. Since the MII does not include an in-
terrupt line, a polling mechanism is required for detecting a status change in
the transceiver. In order to reduce the software overhead, the above men-
tioned polling mechanism has been implemented in hardware. When this
mode of operation is enabled, the MIF will continuously poll a specified
transceiver register, and generate a maskable interrupt when a status change
is detected. Upon detection of an interrupt, the software can read a local status
register that will provide the latest contents of the transceiver register, and an
indication which bits have changed since it was last read. This mode of oper-