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STP2002QFP
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
Sun Microsystems,
When DIR is set to 1, the pins configured as bidirectional change direction
and their corresponding direction control pins are set accordingly. Note that
the input status pins (ERR, SLCT, PE), which are readable in the input regis-
ter, are not configurable. They are fixed as inputs. Similarly, the output pins
(PP_AFXN, PP_INIT, PP_SLCT_IN) of the output register are fixed as
outputs.
The transfer modes are shown and discussed in the following sections.
4.3.1.3 Master Write Protocol, Slave Operation
This section describes the parallel port operation as a slave when it is config-
ured for master write protocol (DS_DSEL=1). Operation as a master is the
same as is described in the “Unidirectional Operation (Transfers to the Pe-
ripheral Device)” section on page 15.
In this mode, acknowledge and/or busy can be generated in response to a
data strobe. The width of the P_ACK (PP_ACK) pulse can be defined using
the DSW bits of the hardware configuration register. The P_BSY (PP_BSY)
hold time and P_ACK (PP_ACK) positioning after the trailing edge of data
strobe are defined using the DSS bits. However, note that in this mode DSS
has a tolerance of +3 to 4 SBus clocks, due to synchronization delays. The
nominal programmability range is the same as was specified in the “Unidirec-
tional Operation (Transfers to the Peripheral Device)” section on page 15.
The ACK_OP andBUSY_OP bits are used to specify handshake protocol.
The function of the bits take on a new meaning when the parallel port is a
slave.
Table 9:
Signal I/O DIR_Pin State
P_D_STRB (PP_STB) O P_DS_DIR (PP_DSDIR) 1
P_ACK (PP_ACK) I P_ACK_DIR (PP_ACKDIR) 0
P_BSY (PP_BSY) I P_BSY_DIR (PP_BSYDIR) 0
P_DATA (PP_DATA) O P_D_DIR (PP_DDIR) 1
ACK_OP 1 = Generate P_ACK (PP_ACK) in response to a data strobe.
0 = P_ACK (PP_ACK) is not generated. P_ACK is held in an inactive state.
BUSY_OP 1 = Generate P_BSY (PP_BSY) as an acknowledge, in response to data strobe.
0 = P_BSY (PP_BSY) is not generated for each byte transferred, but is asserted
as required.