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STP2002QFP
Sun Microelectronics
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
6.2.3 Instruction Decode Logic
Figure 17.
The instruction decode logic decodes the value at the parallel outputs of the
instruction register and selects the appropriate scan data register and control
signals.
BYPASS_SELECT
ID_SELECT
ISCAN_MODE
ATPG_SELECT
INTERNAL_SELEC
T
DEBUG_SELECT
BSCAN_SELECT
SCSI_SELECT
CCR_SELECT
BSCAN_OMC
IR_VALUE[3:0]
JTAG_DECODE