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STP2002QFP
Sun Microelectronics
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
• Byte counter is decremented, every time a byte is transferred between
SCSI and FAS366.
• No interrupt is generated when the D_BCNT reaches 0 (expires).
• D_BCNT will clear to 0, if D_RESET is asserted.
• D_BCNT should not be programmed with a number, different than the
one in the transfer count register of FAS366.
7.3.4 SCSI Test Control/Status Register
Parity_Error:
This bit is set if a parity error is detected on the CEI. It will cleared on a hard-
ware reset or a software reset (D_RESET).
Late_Error:
This bit is set if a late error is detected on the CEI. It will cleared on a hard-
ware reset or a software reset (D_RESET).
Loop_Back_Mode:
This bit when set, enables the loop-back mode on the SCSI channel. The
SCSI CE will provide a DMA loop-back mode, in which, data from the host
memory will be moved to the prefetch buffers. Once the data is in the prefetch
Table 48: SCSI Test Control/Status Register Address
Register Physical Address Access Size
Test control/Status register (D_TST_CSR) 0x880_000C 1 byte
Table 49: SCSI Test Control/Status Register Definition
Field Bits Description Type
PARITY_ERROR 0 Set when a parity error is detected on the
internal channel engine interface (CEI)
R/W
LATE_ERROR 1 Set when a late error is detected on the CEI R/W
LOOP-BACK MODE 2 When set, programs the SCSI channel to be
in DMA LOOP_BACK mode
W
LOOP-
BACK_DONE
3 When set, indicates that DMA LOOP-BACK
is complete
R
ERROR_ACK 4 Set when an error ACK is detected on the CEI R