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STP2002QFP
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
Sun Microsystems,
programmed I/O write cycle.
FIFO_Tag_Error
The data structures in the local FIFOs make use of tag bits for delimiting
packet boundaries. The last data word and the control/status word of a frame
are expected to have their tag bits set to 1. If the unload control state machine
does not see two consecutive tag bits set to 1, a local memory failure is rec-
ognized, and the unloading process is aborted.
5.3.2 Non-Fatal Errors
The error conditions described below can occur in the specified DMA chan-
nel only.
Tx_FIFO_Underrun
This error condition can occur only when the programmable threshold is used
to enable transmission of the frame by the TX_MAC (the threshold value is
less than the maximum frame size). If the available bandwidth on the SBus
dedicated to transmit DMA is less than the available throughput on the net-
work, the TxFIFO may run out of data before the frame transmission has
completed. The TX_MAC may become “starved” for data, and the frame
transmission is aborted. The unloading of the frame from the FIFO will con-
tinue until the entire frame is transferred to the TX_MAC, but the TX_MAC
will drop the remainder of the frame into the bit bucket. The TX_MAC will
generate an interrupt to the device driver to indicate the occurrence of this
event.
Rx_Abort (Early and Late)
A receive frame can be aborted for various reasons at any time during the
frame transfer from the network to the host memory. The intent of the provid-
ed abort mechanism is to utilize the available hardware resources efficiently,
without incurring unnecessary performance penalties.
If an abort condition is detected before the frame transfer has begun from
the RX_MAC into the RxFIFO (address detection criteria, short fragment,
etc.), the RX_MAC drops the frame and the receive DMA channel never sees
it.
If an abort condition occurred after the frame transfer from the RX_MAC
into the RxFIFO has begun, but before at least 128 bytes of data were trans-
ferred from the RX_MAC to the RxFIFO (long fragment, etc.), the load
control state machine rewinds the write pointer to the shadow write pointer