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STP2002QFP
Fast Ethernet, Parallel Port, SCSI (FEPS) - STP2002QFP
Sun Microsystems,
7.4.17 FAS366 Status #2 Register
The status #2 register is a read-only register that indicates detailed status in-
formation about the FIFO, the DMA interface, the sequence counter, the
transfer counter, the recommand counter, and the command register.
7.4.18 FAS366 Test Register
The test register is an eight-bit, write-only register that is used during produc-
tion chip testing to test the FAS366 in various modes.
Table 81: FAS366 Clock Conversion Factor Register Definition
Field Bits Description Type
Clock conversion factor 7:0 Allows for fast synchronous response time,
set parity ATN and interrupt masks and
indicates the clock conversion factor
W
Table 82: FAS366 Status #2 Register Address
Register Physical Address Access Size
Status #2 register 0x881_0024 1 byte
Table 83: FAS366 Status #2 Register Definition
Field Bits Description Type
Status #2 7:0 Indicates status of FAS366 and SCSI bus R
Table 84: FAS366 Test Register Address
Register Physical Address Access Size
Test register 0x881_0028 1 byte
Table 85: FAS366 Test Register Definition
Field Bits Description Type
Test 7:0 Used during production chip testing to test FAS366 W