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1.2 System Unit Block Diagram 1 Hardware Overview
Firmware Hub (FWH)
• One STMicro M50FW080N1 is used.
• This gate array has the following features:
– Firmware hub hardware interface mode
– Two configurable interfaces
– Program/erase controller
– Program and erase suspend
– 8Mbits of flash memory for platform code/data nonvolatile storage
– Address/Address-Multiplexed (A/A Mux) interface/mode
– Case temperature operating range
– Vcc: 3V to 0.36V
– Vpp: 12V for fast programming
• 8Mbits of flash memory are used as shown below:
– 64KB are used for VGA-BIOS.
– 288KB are used for system BIOS.
– 8KB are used for plug and play data area.
– 8KB are used for password security.
– 16KB are used for boot strap.
– 32KB are used for ACPI P code.
– 48KB are used for LOGO.
– 128KB are reserved for LAN BIOS.
− 432KB are reserved.
VGA Controller
One nVIDIA NV34M chip is used. The video controller incorporates graphics accelerator
and video accelerator.
• Internal VRAM, 32MB/64MB DDR 250MHz
• AGP bus R2.0 ×4
• LCD Interface LVDS 2ch
• TV Encoder: Supports S-video
• DVI Supported by Dock
Sound Controller
• One AC'97Codec AD1981B chip and AC-Link controller embedded in ICH4-M
• SW sound
TECRA M2 Maintenance Manual (960-468) 1-11