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System Introduction 1-31
For suspend-to-disk, all devices are read, saved to local memory and the local memory, video
memory are saved to a disk file which is created by SLEEP MANAGER utility. The machine is
then commanded to an off state.
• Resume events for zero-volt suspend(suspend-to-disk)
The only resume event for zero-volt suspend is the raising of the lid of the computer. This
electronically enables the power to the rest of the machine.
• Resume events for static suspend (suspend-to-memory)
1. Resume on schedule. In BIOS Setup, this time field can be enabled then set to any
value. It is possible to set it for a date and time in the past. In this case, the unit will
resume at the next occurrence of the specified time, date ignorant. If a proper future
date is specified, then the resume will only happen long enough to evaluate the date
and the machine will re-suspend. After a successful resume has taken place, the
resume on schedule field will automatically disable. . Enabling of this field will disable
the suspend-to-disk function, except for battery very low. The auto-disable of resume
on schedule still allows the unit to suspend to disk at the next occurrence of a suspend
condition with the lid closed.
2. Lid switch. If the suspend-to-disk option is used, then the lid switch will turn the unit on,
reboot and then resume to the application at the end of POST. If the suspend-to-
memory option is in place, or a suspend-to-disk block is present, then the lid switch
opening will resume the machine.
3. Keystroke. Any key use on the internal keyboard will wake up the system from static
suspend. In addition, a keystroke from an external keyboard on the primary PS/2 port
will also wake the system up. Mouse motion from any source will not wake the system
up.
4. Battery very low. The SMC will wake the SMI if the battery reaches a very low condition
during static suspend.
1.6.8 CPU Module
Table 1-16 CPU Module Specifications
Item Specification
CPU Type Tillamook-200,233
Package TCP
Module replaceable Yes
Working speed 66MHz
CPU voltage 2.5V I/O and 1.8V core interface
Cache SRAM size 512KB
Remark: include North bridge(MTXC), voltage regulator and thermal sensor