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BIOS POST Checkpoints E-3
Table E-1 POST Checkpoint List
Checkpoint Description
68h
• Enables UIE, then checks RTC update cycle
Note: The RTC executes an update cycle per second. When the UIE is set, an
interrupt (IRQ8) occurs after every update cycle and indicates that over 999ms
are available to read valid time and date information.
70h
• Parallel port testing
74h
• Serial port testing
78h
• Math coprocessor testing
7Ch
• Reset pointing device
80h
• Set security status
84h
• KB device initialization
• Set KB led upon setup requests
• Enable KB device
86h
• Issue 2nd software SMI to communicate with PMU
• Enable the use of BIOS Setup, system information. and fuel gauge
6Ch
• Tests and initializes FDD
Note: The FDD LED should flash once and its head should be positioned.
6Dh
• password checking
88h
• HDD, CD testing & parameter table setup
• Initializes HDD, CD enhanced features
90h
• Displays POST status if necessary
• Changes POST mode to default text mode
94h
• Initializes I/O ROM
Note: I/O ROM is an optional extension of the BIOS located on an installed add-on
card as a part of the I/O subsystem. POST detects I/O ROMs and gives them
opportunity to initialize themselves and their hardware environment.
• Shadows I/O ROM if setup requests
• Builds up free expansion ROM table
96h
• Initializes PCI Card ROM
• Writes ESCD data into NVRAM
97h
• Writes ESCD data into NVRAM
A0h
• Initializes timer counter for DOS use
A4h
• Initializes security feature
ACh
• Enables NMI
• Enables parity checking
• Sets video mode
AEh
• Issues 3rd software SMI to communicate with PMU
• Starts all power management timers
• Checks whether system is resumed from 0V suspend or not.