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6 Test the next clock.
a Press the Format key, then select Master Clock.
b Turn off and disconnect the clock just tested.
c Repeat steps 3 and 5 for the next clock listed in the table in step 3, until all listed clock
edges have been tested.
7
Test the next setup/hold combination. a Press the Format key, then select Master
Clock and turn off the clock just tested. b Repeat steps 1 through 7 for the next
setup/hold combination listed in step 1, until all listed setup/hold combinations have
been tested.
When aligning the data and clock waveforms using the oscilloscope, align the waveforms
according to the setup time of the setup/hold combination being tested, +0.0 ps or -100.0 ps.
Testing Performance
To test the single-clock, multiple-edge, state acquisition
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