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288 AMD Geode™ SC1200/SC1201 Processor Data Book
Core Logic Module - USB Controller Registers - PCIUSB
32579B
2 StartOfFrameEnable.
0: Ignore.
1: Disable interrupt generation due to Start of Frame.
1 WritebackDoneHeadEnable.
0: Ignore.
1: Disable interrupt generation due to Writeback Done Head.
0 SchedulingOverrunEnable.
0: Ignore.
1: Disable interrupt generation due to Scheduling Overrun.
Note: Writing a 1 to a bit in this register clears the corresponding bit, while writing a 0 to a bit leaves the bit unchanged.
Offset 18h-1Bh HcHCCA Register (R/W) Reset Value = 00000000h
31:8 HCCA. Pointer to HCCA base address.
7:0 Reserved. Read/Write 0s.
Offset 1Ch-1Fh HcPeriodCurrentED Register (R/W) Reset Value = 00000000h
31:4 PeriodCurrentED. Pointer to the current Periodic List ED.
3:0 Reserved. Read/Write 0s.
Offset 20h-23h HcControlHeadED Register (R/W) Reset Value = 00000000h
31:4 ControlHeadED. Pointer to the Control List Head ED.
3:0 Reserved. Read/Write 0s.
Offset 24h-27h HcControlCurrentED Register (R/W) Reset Value = 00000000h
31:4 ControlCurrentED. Pointer to the current Control List ED.
3:0 Reserved. Read/Write 0s.
Offset 28h-2Bh HcBulkHeadED Register (R/W) Reset Value = 00000000h
31:4 BulkHeadED. Pointer to the Bulk List Head ED.
3:0 Reserved. Read/Write 0s.
Offset 2Ch-2Fh HcBulkCurrentED Register (R/W) Reset Value = 00000000h
31:4 BulkCurrentED. Pointer to the current Bulk List ED.
3:0 Reserved. Read/Write 0s.
Offset 30h-33h HcDoneHead Register (R/W) Reset Value = 00000000h
31:4 DoneHead. Pointer to the current Done List Head ED.
3:0 Reserved. Read/Write 0s.
Offset 34h-37h HcFmInterval Register (R/W) Reset Value = 00002EDFh
31 FrameIntervalToggle (Read Only). This bit is toggled by HCD when it loads a new value into FrameInterval.
30:16 FSLargestDataPacket (Read Only). This field specifies a value which is loaded into the Largest Data Packet Counter at
the beginning of each frame.
15:14 Reserved. Read/Write 0s.
13:0 FrameInterval. This field specifies the length of a frame as (bit times - 1). For 12,000 bit times in a frame, a value of 11,999
is stored here.
Table 6-42. USB_BAR+Memory Offset: USB Controller Registers (Continued)
Bit Description