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Hardware Description
3-8
© Copyright ARM Limited 1999. All rights reserved.
ARM DUI 0125A
3.5 Reset controller
The core module FPGA incorporates a reset controller which enables the core module
to be reset as a standalone unit or as part of an Integrator development system. The core
module can be reset from five sources:
• reset button
• motherboard
• other core modules
• Multi-ICE
• software.
Figure 3-3 shows the architecture of the reset controller.
Figure 3-3 Core module reset controller
Reset
control
Sync
FPGA
BnRES_M
nSRST
nSYSRST
nDONE
PBRST
Core
Motherboard
and other
core modules
Multi-ICE
nMBDET
SWRST
0
1