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ARM DUI 0125A
© Copyright ARM Limited 1999. All rights reserved.
Index-iii
SDRAM operating mode 3-6
SDRAM repeat mapping 4-4
SDRAM status and control register 4-14
SDRAM, SPD memory 4-16
Serial presence detect 3-6
Setting CAS latency 4-15
Setting SDRAM size 4-15
Setup
power connections 2-3
standalone 2-2
Software interrupt registers 4-22
Software reset 4-11
SPD memory 4-16
SPDOK bit 4-14
SSRAM accesses 4-2
SSRAM controller 3-3
Standalone core module 2-2
Status and configuration registers 1-6
Status register 4-12
Status register, interrupt 4-20
Supplying power 2-3
System architecture 1-4
System bus
operating modes 3-16
System bus bridge 1-5, 3-11
System bus signal routing 3-15
T
Typographical conventions ix
U
Using the core module with a
motherboard 2-5
V
VCO divider 3-18, 3-19
Vector mapping 4-6
Volatile memory 1-6
W
Web site, ARM ii