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© Copyright ARM Limited 1999. All rights reserved.
ARM DUI 0125A
4.3.5 CM_STAT (0x10000010)
The core module status register (CM_STAT) is a read-only register that can be read to
determine where in a multi-core module stack this core module is positioned.
Table 4-6 describes the core module status register bits.
Table 4-6 CM_STAT register
Bit Name Access Function
31:8 Reserved Use read-modify-write to preserve value.
7:0 ID Read Card number:
0x00 = core module 0
0x01 = core module 1
0x02 = core module 2
0x03 = core module 3
0xFF = invalid or no motherboard attached.
31 078
Reserved
ID