ARM CM940T Computer Hardware User Manual


 
Index
Index-ii
© Copyright ARM Limited 1999. All rights reserved.
ARM DUI 0125A
Connectors
HDRA and HDRB 1-3
Multi-ICE 2-4
power 2-3
Controller
clock 1-6, 3-17
reset 1-5, 3-8
SDRAM 1-5, 3-6
SSRAM 3-3
Controllers
FIQ 4-19
IRQ 4-19
Core module control register 4-11
Core module FPGA 1-5
Core module ID 2-6
Core module registers 4-7
Core module, stack position 4-12
CORECLK 3-17, 3-18
D
Debug comms channel 4-19
Debugging modes 3-23
DIMM socket 1-3
Document confidentiality status ii
E
Electromagnetic conformity iii
Enable register, interrupt 4-20, 4-21
Ensuring safety 1-11
Exception vector mapping 4-6
F
FCC notice iii
FIFOs 3-11
FIQ controller 4-19
Fitting SDRAM 2-2
FPGA 1-5
G
Global SDRAM 4-5
H
HDRA 3-15
HDRA and HDRB connectors 1-3
I
ID, core module 2-6
Interface
system bus 1-5
Interrupt control 4-20
Interrupt register bit assignment 4-21
Interrupt registers 4-19
Interupt status 4-20
IRQ and FIQ register bit
assignment 4-21
IRQ controller 4-19
J
JTAG 3-21
JTAG debug 1-7
JTAG scan path 3-22
JTAG signals 3-24
JTAG, connecting 2-4
L
LCLK 3-17, 3-19
Local SDRAM 4-4
Location of connectors 1-3
Lock register 4-13
M
MBDET bit 4-11
Memory
volatile 1-6
Memory map 4-2
MEMSIZE 4-15
Microprocessor core 3-2
MISC LED control 4-11
Motherboard detect 4-3
Motherboard, attaching the core
module 2-5
Multi-ICE 1-7, 3-21
connecting 2-4
Multi-ICE connector 1-3
N
nLCLK 3-19
nMBDET 3-22
Normal debug mode 3-23
Notices, FCC iii
O
Operating mode, SDRAM 3-6
Oscillator register 4-9
Output divider 3-18, 3-19
P
Power connector 1-3, 2-3
Powering an attached core module 2-6
Precautions 1-11
Preventing damage 1-11
Processor bus clock 3-19
Processor core clock 3-18
Processor register 4-8
Product feedback xi
Product status ii
Proprietary notice ii
R
Raw status register, interrupt 4-20
REFCLK 3-17, 3-20
Reference clock 3-20
Register addresses 4-7
Registers 1-6
CM_CTL 4-2
CM_CTRL 4-11
CM_FIQ_ENCLR 4-19
CM_FIQ_ENSET 4-19
CM_FIQ_RSTAT 4-19
CM_FIQ_STAT 4-19
CM_ID 4-5, 4-8
CM_IRQ_ENCLR 4-19
CM_IRQ_ENSET 4-19
CM_IRQ_RSTAT 4-19
CM_IRQ_STAT 4-19
CM_LOCK 4-13
CM_OSC 3-18, 3-19, 4-9
CM_PROC 4-8
CM_SDRAM 4-14
CM_SOFT_INTCLR 4-19
CM_SOFT_INTSET 4-19
CM_STAT 4-12
Related publications x
REMAP bit 4-11
Remap, effect of 4-2
Reset control bit 4-11
Reset controller 1-5, 3-8
S
SDRAM
fitting 2-2
SDRAM access arbitration 3-6
SDRAM accesses 4-4
SDRAM controller 1-5, 3-6
SDRAM global access 4-5