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Chip Configuration Module (CCM)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 9-3
9.3.2 Memory Map
9.3.3 Register Descriptions
The following section describes the CCM registers.
9.3.3.1 Chip Configuration Register (CCR)
Table 9-3. Chip Configuration Module Memory Map
IPSBAR
Offset
1
1
Addresses not assigned to a register and undefined register bits are reserved for expansion.
Register
Width
(bits)
Access Reset Value Section/Page
Supervisor Mode Access Only
0x11_0004 Chip Configuration Register (CCR) 16 R 0x0001 9.3.3.1/9-3
0x11_0007 Low-Power Control Register (LPCR)
2
2
See Chapter 8, “Power Management” for a description of the LPCR. It is shown here only to warn against accidental writes
to this register.
8 R/W 0x00 8.2.5/8-8
0x11_0008 Reset Configuration Register (RCON) 16 R 0x0000 9.3.3.2/9-4
0x11_000A Chip Identification Register (CIR) 16 R See note
3
3
The reset value for the CIR is device-dependent.
9.3.3.3/9-4
0x11_0010 Unimplemented
4
4
Accessing an unimplemented address has no effect other than causing a cycle termination transfer error.
—
IPSBAR
Offset:
0x11_0004 (CCR) Access: Supervisor read-only
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R0 0 0 0 0 Mode 0 0 0 0 0000
W
Reset0 0 0 0 011000 0 00 0 0 1
Figure 9-1. Chip Configuration Register (CCR)
Table 9-4. CCR Field Descriptions
Field Description
15–11 Reserved, should be cleared.
10-8
Mode
Chip configuration mode. This read-only field reflects the configuration selected at reset.
111 Reserved
110 Single Chip Mode
101 EzPort Mode
100 Reserved
0xx Reserved
7–0 Reserved, should be cleared.