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Universal Serial Bus, OTG Capable Controller
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
15-20 Freescale Semiconductor
15.4.1.12 Error Interrupt Enable Register (ERR_ENB)
The Error Interrupt Enable Register contains enable bits for each of the error interrupt sources within the
USB Module. Setting any of these bits enables the respective interrupt source in the ERR_STAT register.
Each bit is set as soon as the error conditions is detected. Therefore, the interrupt does not typically
correspond with the end of a token being processed. This register contains the value of 0x00 after a reset.
Figure 15-18 shows the ERR_ENB register.
IPSBAR
Offset:
0x1C_008C (ERR_ENB)
Access: User read/write
76543210
R
BTS_ERR
_EN
Reserved
DMA_ERR
_EN
BTO_ERR
_EN
DFN8_EN CRC16_EN
CRC5_EOF
_EN
PID_ERR
_EN
W–
Reset:00000000
Figure 15-18. Error Interrupt Enable Register
Table 15-22. ERR_ENB Field Descriptions
Field Description
7
BTS_ERR
_EN
BTS_ERR Interrupt Enable
0 The BTS_ERR interrupt is not enabled
1 The BTS_ERR interrupt is enabled
6 Reserved
5
DMA_ERR
_EN
DMA_ERR Interrupt Enable
0 The DMA_ERR interrupt is not enabled
1 The DMA_ERR interrupt is enabled
4
BTO_ERR
_EN
BTO_ERR Interrupt Enable
0 The BTO_ERR interrupt is not enabled
1 The BTO_ERR interrupt is enabled
3
DFN8_EN
DFN8 Interrupt Enable
0 The DFN8 interrupt is not enabled
1 The DFN8 interrupt is enabled
2
CRC16_EN
CRC16 Interrupt Enable
0 The CRC16 interrupt is not enabled
1 The CRC16 interrupt is enabled
1
CRC5_EOF
_EN
CRC5/EOF Interrupt Enable
0 The CRC5/EOF interrupt is not enabled
1 The CRC5/EOF interrupt is enabled
0
PID_ERR
_EN
PID_ERR Interrupt Enable
0 The PID_ERR interrupt is not enabled
1 The PID_ERR interrupt is enabled