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Register Memory Map Quick Reference
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
A-18 Freescale Semiconductor
IPSBAR + 0x1B_0014 PWM Channel Period Register 0 PWMPER0 8
IPSBAR + 0x1B_0015 PWM Channel Period Register 1 PWMPER1 8
IPSBAR + 0x1B_0016 PWM Channel Period Register 2 PWMPER2 8
IPSBAR + 0x1B_0017 PWM Channel Period Register 3 PWMPER3 8
IPSBAR + 0x1B_0018 PWM Channel Period Register 4 PWMPER4 8
IPSBAR + 0x1B_0019 PWM Channel Period Register 5 PWMPER5 8
IPSBAR + 0x1B_001A PWM Channel Period Register 6 PWMPER6 8
IPSBAR + 0x1B_001B PWM Channel Period Register 7 PWMPER7 8
IPSBAR + 0x1B_001C PWM Channel Duty Register 0 PWMDTY0 8
IPSBAR + 0x1B_001D PWM Channel Duty Register 1 PWMDTY1 8
IPSBAR + 0x1B_001E PWM Channel Duty Register 2 PWMDTY2 8
IPSBAR + 0x1B_001F PWM Channel Duty Register 3 PWMDTY3 8
IPSBAR + 0x1B_0020 PWM Channel Duty Register 4 PWMDTY4 8
IPSBAR + 0x1B_0021 PWM Channel Duty Register 5 PWMDTY5 8
IPSBAR + 0x1B_0022 PWM Channel Duty Register 6 PWMDTY6 8
IPSBAR + 0x1B_0023 PWM Channel Duty Register 7 PWMDTY7 8
IPSBAR + 0x1B_0024 PWM Shutdown Register PWMSDN 8
USB OTG Registers
IPSBAR + 0x1C_0000 Peripheral ID Register PER_ID 8
IPSBAR + 0x1C_0004 Peripheral ID Complement Register ID_COMP 8
IPSBAR + 0x1C_0008 Peripheral Revision Register REV 8
IPSBAR + 0x1C_000C Peripheral Additional Info Register ADD_INFO 8
IPSBAR + 0x1C_0010 OTG Interrupt Status Register OTG_INT_STAT 8
IPSBAR + 0x1C_0014 OTG Interrupt Control Register OTG_INT_EN 8
IPSBAR + 0x1C_0018 OTG Status Register OTG_STATUS 8
IPSBAR + 0x1C_001C OTG Control Register OTG_CTRL 8
IPSBAR + 0x1C_0080 Interrupt Status Register INT_STAT 8
IPSBAR + 0x1C_0084 Interrupt Enable Register INT_ENB 8
IPSBAR + 0x1C_0088 Error Interrupt Status Register ERR_STAT 8
IPSBAR + 0x1C_008C Error Interrupt Enable Register ERR_ENG 8
IPSBAR + 0x1C_0090 Status Register STAT 8
IPSBAR + 0x1C_0094 Control Register CTL 8
Table A-3. Register Memory Map (continued)
Address Name Mnemonic Size (bits)