Intel 8051 Laptop User Manual


 
8051
Architectural Specification and Functional Description
DIRECT
Adchuing
- Opet'llnd
RAM
(I11III
0-127) or
SFA
(I11III
128-255)
RAM (0-127)
or
SFR
(128-255)
REGISTER Addressing
Operand
C
A
R7oRO
DPTR
REGISTER-INDIRECT Acldrealng
- Opet'llnd
@R1.
@RO
[I
•••• RAM (0-255)]
Note,
SFR
= Special Funcllon
Regia'"
OperaUon
SETB.CLR.CPL
INC. DEC
Operation
SETB.CLR.CPL
INC. DEC. DA, CLR.
CPL. RL, RLC.
RR.
RRC.
SWAP
INC. DEC
INC
Operation
INC. DEC
Figure 2.33.C. Operand Addressing
Single-Operand Operations
DIRECT, DIRECT
Ad~g
- Opet'llnd 1 Operand 2
RAM or SFA RAM or
SFA
DIRECT. REGISTER
Adchuing
Opet'llnd 1 OperMCI 2
RAM
(I11III)
or
SFR
(bI")
C
C~RAM(IIIIII)
C
or
SFR
(I11III1
RAMorSFA
A
RAM or SFR
RT-RD
DIRECT. REGISTER-INDIRECT AcIdreUIng
- Operand 1 -
Operand
2
RAM
or
SFR
@R1.
@RD
DIRECT. IMMEDIATE Addressing
-
Opmmd1
OperMCl2
RAM
or
SFA
PM
(ImmedI"')
Note:
PM
= Progr
....
M
....
ory
Operation
MOV
Operation
MOV.
ANL, ORL
ANL,ORL
. MOV. ANL, ORL, XRL
MOV
Operation
MOV
Operation
MOV,
ANL, ORL, XRL
Figure 2.33.D. Operand Addressing
Two-Operand Operations
REGISTER, DIRECT Addressing
Operand 1 Operand 2
C
RAM
(bils)
or
SFR
(bl")
A
RAMorSFR
RT-RO
RAM
or
SFR
REGISTER, REGISTER Addressing
Operand 1 Operand 2
A
R7-RD
R7-RO
A
A B
REGISTER, REGISTER-INDIRECT Addressing
Operand 1 Operand 2
A
@R1,
@RO
[RAM (0-255)]
A @Rl,@RO [EXT DATA
(0-255)]
A
@OPTR
[EXT
DATA
(o-64K)]
PC
@SP[RAM (0-255)]
REGISTER, IMMEDIATE Addressing
Operand 1 Operand 2
A
PM
(Immedlale)
R7-RO
PM
(Immediate)
DPTR
PM
(Immedlale)
PC
PM
(Immediate)
Note:
PM
= Program Memory
Operalion
MOV
MOV,
XCH. ADD,
ADDC, SUBB,JI.NL,
ORL,
XRL
MOV
Operation
MOV,
XCH,
ADD,
ADDC, SUBB,ANL,
ORL.
XRL
MOV
MUL,DIV
Operation
MOV,
XCH,
ADD,
ADDC, SUBB, ANL.
ORL,
XRL,
XCHD
MOVX
MOVX
RET,
RETI
Operation
MOV,
ADD, ADDC,
SUBB, ANL, ORL,
XRL
MOV
MOV
WMP,AJMP,
SJMP
Figure 2.33.E. Operand Addressing
Two-Operand Operations
22
• REGISTER-INDIRECT. DIRECT Addressing
Operand 1 Operand 2
@R1,
@RO[RAM (0-255)]
RAM
or
SFA
@SP
[RAM (0-255)]
RAM
or
SFR
REGISTER-INDIRECT, REGISTER Addressing
Operand
1
Opera~2
@R1,
@RO
[RAM (0-255)] A
@R1.
@RO
[EXT DATA (0-255)] A
@DPTR[EXT
DATA(o-64K)] A
REGISTER-INDIRECT. IMMEDIATE Addressing
Operand 1
Opera~
2
@R1,
@RO
[RAM (0-255)]
PM
(immediate)
Operation
MOV
PUSH.
POP
Operation
MOV
MOYX
MOYX
Operation
MOV
Figure
2.33.F.
Operand Addressing
Two-Operand Operations
REGISTER, BASE-REGISTERopIus-INDEX-REGISTER-INDIRECT
AddressIng
Operand 1 Operand 2 -
Operand
3 . Opsrmlon
A @ DPTR+A MOVC
A @PC+A MOVC
PC @ DPTR+A JMP (IndINcI)
REGISTER. IMMEDIATE, REGISTER-INDIRECT
AddressIng
- Operand 1 - Operand 2 - Operand 3
PC
PM
(Immediate) @SP
REGISTER, IMMEDIATE, DIRECT AcIdeuIng
Oper~
1
Operand
2 Operand 3
PC
PM
RAM
(I11III)
or
SFR(IIIIII)
PC
PM
RAM •
SFA
REGISTER, IMMEDIATE, REGISTER Addrasling
Operand'
Operand 2 Operand 3
PC
PM
C
PC
PM
A
PC
PM
RT-RO
OperatIon
LCALL,
ACALL
Opsrmlon
JB,JNB,
JBC
DJNZ
0
...........
JC,JNC
JZ.JNZ
DJNZ
Figure 2.33.G. Operand Addressin'g
Three-Operand Operations
REGISTER, IMMEDIATe, REGISTER. DIRECT
AcIdnuIng
- Operand 1 - Operand 2 - Operand 3 - Operand 4 - Operation
PC
PM
A
RAM
or
SFA
CJNE
REGISTER. IMMEDIATE. REGISTER. IMMEDIATE Addressing
- Operand 1 - Operand 2 -
Oper~
3 - Operand 4 - Operation
PC
PM
A
PM
CJNE
PC PM
RT-RO
PM CJNE
REGISTER, IMMEDIATE, REGISTER-INDIRECT, IMMEDIATE Addressing
- Operand 1 - Operand 2 - Operand 3 - Operand 4 - Operation
PC
PM
@R1.
@RO
PM
CJNE
Figure 2.33.H. Operand AddreSSing
FourmOperand Operations
2.8 INTERRUPT SYSTEM
Interrupts result in a transfer of control to a new program
location. The program servicing the request begins
at
this
address. In the
8051
there are five hardware resources that
can generate
an
interrupt request. The starting address of
the interrupt service program for each interrupt source
is
shown in Figure
2.34.
A resource requests an interrupt by setting its associated
interrupt request flag
in
the TCON or SCON register, as
detailed
in
Figure 2.35. The interrupt request will be
AFN-Ol488A-26