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8051
Architectural Specification and Functional Description
program must also enable the backup power supply to
the
RST/VPD
pin. Applying power to the RST/VPD pin
resets the
805
I and retains the internal RAM data valid
as the VCC power supply falls below limit. Normal opera-
tion resumes when
RST/VPD
is
returned
low.
Figure
2.56 shows the waveforms for the power-down sequence.
2.14 EPROM PROGRAMMING
The
8751
is
programmed and the
8051
and
8751
are
verified using the
UPP-851 programming card. For pro-
gramming and
verification, address
is
input on Port I
and
Port pins 2.0-2.3. Pins P2.4 and P2.5 are held to a
TTL
low.
Data
is
input and output through Port
O.
RST/VPD
is
held at a TTL high level and PSEN
is
held
at
a TTL low
level
during program and
verify.
To
pro-·
gram,
ALE/PROG
is
held at a TTL low level. ALE/
PROG
is
held
at
a TTL high level to verify the program.
Port pin
2.7
forces the Port 0 output drivers to the high
impedence state when held
at
a TTL high level and
is
held
at
a TTL low
level
for verification. Erasure
of
an
8751
will
leave the EPROM programmed to an all one's (I's)
state.
2.15 THE
8051
AS
AN EVOLUTION OF
THE 8048
For
every
8048
instruction there
is
a corresponding
8051
instruction,
or
in rare cases, a short sequence
of
instruc-
tions.
An
example of the latter
is
the adjustment required
for the
use the
8051
makes of PC- and DPTR-relative
addressing. Thus, while the
8051
has new bit patterns
in its instruction coding, the functions
of
the
8048
may
be
performed
by
the 8051. For this purpose Intel provides
a conversion program
(CONV-51) which translates
8048
assembly source code to
8051
assembly source code. In
the
8051
the stack pointer has been changed from a 3-bit
field in the
PSW to
an
8-bit register. Therefore, the stack
pointer does not
"roll-over" from address
23
to address
8,
but
will
increment to address
24.
In general,
8048
code
that manipulates the stack pointer cannot
be
translated
by
CONV-51. In translating
8048
code, upon an interrupt,
an unused RAM location can
be
used for storing the
PSW using the PUSH instruction with Direct Addressing
to keep the
8051
's stack
size
equivalent to that of the
8048.
8048
and
8049
programs using only the low-order six or
seven bits of RI and
RO
in Indirect Addressing must now
use all eight bits. Thus, bit seven (and bit six for
8048
programs) must
be
zero.
8048
operations no longer necessary (and invalid) for the
8051
are MOVD, ANLD and ORLD. These instructions
control the 8243
I/O
expander chip. Since the
8051
uses a
shift register for low-cost
I/O
expansion, these are no
longer necessary. However, the
8051
can interface to an
8243
using standard instructions on its ports. Also no
longer needed are the
ENTO
CLK and SEL MBi instruc-
tions. The
8051
uses ALE (along with RD and
WR
when
necessary) as the
s.ystem
clock. The 64K contiguous
memory preempts the need for the
SEL MBi instructions.
The
SEL RBi instructions are preempted by instructions
that manipulate the
PSW.
2.16 DEVELOPMENT SYSTEM AND
SOFTWARE SUPPORT
The
8051
is
supported by a total range
of
Intel develop-
ment tools. This broad range
of
support shortens the
product development cycle and thus brings the product
to market sooner.
• ASM51 Absolute macro assembler for the
8051.
• CONV51
8048
assembly language source code to
8051
assembly source code conversion program.
• EM-51 8051/8751
emulator
board
that
uses a
modified
8051
and an EPROM.
•
ICE-5J™
• UPP-851
•
Real-time in-circuit emulator.
PROM
programmer personality card.
8051
Workshop.
8051 Software Development Package
(ASM51 and CONV51)
The
8051
software development package provides de-
. velopment system support for the powerful
8051
family
of
single chip microcomputers. The package contains
a symbolic macro assembler and
8.048
to
8051
source
code converter. This diskette-based software package
runs
under
ISIS-II
on any Intellec® Microcomputer
Development
System with 64K bytes
of
memory.
34
8051 Macro Assembler (ASM51)
The
8051
macro assembler translates symbolic
8051
as-
sembly language instructions into machine exectuable
object code. These assembly language mnemonics are
easier to program and are more readable than binary
or
hexidecimal machine instructions. Also,
by
allowing the
programmer to give symbolic names to memory loca-
tions rather than absolute addresses, software design
and debug are performed more quickly and reliably.
ASM51 provides symbolic access for the many useful
addressing
methods
in the 8051
architecture.
These
features include referencing bit and byte locations, and
provide 4-bit operations for BCD arithmetic. The as-
sembler also provides symbolic access to the bits and
bytes in the RAM and
Special Function Register address
spaces.
The assembler supports macro definitions and calls. This
provides a convenient means
of
programming a frequent-
ly
used code sequence only once. The assembler also
provides conditional assembly capabilities. Cross refer-
encing
is
provided in the symbol table listing, which
shows the user the lines in which each symbol was de-
fined and referenced.
If
an
8051
program contains errors, the assembler pro-
vides a comprehensive set
of
error diagnostics, which are
AFN-Ol488A-38