Filter
Top Products
244
CHAPTER 10 WATCH TIMER
Figure 10-2. Timer Clock Select Register 2 Format
Caution When rewriting TCL2 to other data, stop the timer operation beforehand.
Remarks 1. fXX : Main system clock frequency (fX or fX/2)
2. f
X : Main system clock oscillation frequency
3. fXT : Subsystem clock oscillation frequency
4. × : Don't care
5. MCS : Bit 0 of oscillation mode selection register (OSMS)
6. Figures in parentheses apply to operation with f
X = 5.0 MHz or fXT = 32.768 kHz.
TCL27
7
TCL26
6
TCL25 TCL24
4
0
3210
FF42H
Address
TCL2
Symbol
TCL22 TCL21TCL20
5
00H
After
Reset
R/W
R/W
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
TCL22 TCL21TCL20
f
XX
/2
3
f
XX
/2
4
f
XX
/2
5
f
XX
/2
6
f
XX
/2
7
f
XX
/2
8
f
XX
/2
9
f
XX
/2
11
MCS = 1
f
X
/2
3
(625 kHz)
f
X
/2
4
(313 kHz)
f
X
/2
5
(156 kHz)
f
X
/2
6
(78.1 kHz)
f
X
/2
7
(39.1 kHz)
f
X
/2
8
(19.5 kHz)
f
X
/2
9
(9.8 kHz)
f
X
/2
11
(2.4 kHz)
MCS = 0
f
X
/2
4
(313 kHz)
f
X
/2
5
(156 kHz)
f
X
/2
6
(78.1 kHz)
f
X
/2
7
(39.1 kHz)
f
X
/2
8
(19.5 kHz)
f
X
/2
9
(9.8 kHz)
f
X
/2
10
(4.9 kHz)
f
X
/2
12
(1.2 kHz)
Watchdog Timer Count Clock Selection
0
1
TCL24
f
XX
/2
7
f
XT
(32.768 kHz)
MCS = 1
f
X
/2
7
(39.1 kHz)
MCS = 0
f
X
/2
8
(19.5 kHz)
Watchdog Timer Count Clock Selection
0
1
1
1
1
×
0
0
1
1
×
0
1
0
1
TCL27 TCL26TCL25
Buzzer output disable
f
XX
/2
9
f
XX
/2
10
f
XX
/2
11
Setting prohibited
MCS = 1
f
X
/2
9
(9.8 kHz)
f
X
/2
10
(4.9 kHz)
f
X
/2
11
(2.4 kHz)
MCS = 0
f
X
/2
10
(4.9 kHz)
f
X
/2
11
(2.4 kHz)
f
X
/2
12
(1.2 kHz)
Buzzer Output Frequency Selection