Filter
Top Products
299
CHAPTER 16 SERIAL INTERFACE CHANNEL 0 (
µ
PD78054 Subseries)
Figure 16-5. Serial Bus Interface Control Register Format (2/2)
Note The busy mode can be canceled by start of serial interface transfer. However, the BSYE flag is
not cleared to 0.
Remark CSIE0 : Bit 7 of serial operating mode register 0 (CSIM0)
ACKE Acknowledge Signal Automatic Output Control
0 Acknowledge signal automatic output disable (output with ACKT enable)
Acknowledge signal is output in synchronization with the 9th clock
falling edge of SCK0 (automatically output when ACKE = 1).
Before completion of
transfer
Acknowledge signal is output in synchronization with the falling edge of
SCK0 just after execution of the instruction to be set to 1
(automatically output when ACKE = 1).
However, not automatically cleared to 0 after acknowledge signal output.
After completion of
transfer
1
R/W
R
ACKD Acknowledge Detection
Clear Conditions (ACKD = 0)
• Falling edge of the SCK0 immediately after the busy
mode is released while executing the transfer
start instruction
• When CSIE0 = 0
• When RESET input is applied
Set Conditions (ACKD = 1)
• When acknowledge signal (ACK) is detected at the
rising edge of SCK0 clock after completion of
transfer
BSYE Synchronizing Busy Signal Output Control
0
Disables busy signal which is output in synchronization with the falling edge of SCK0 clock just after
execution of the instruction to be cleared to 0.
R/W
Note
1 Outputs busy signal at the falling edge of SCK0 clock following the acknowledge signal.