Filter
Top Products
3.5 Memory TestMemory Test 3 Tests and Diagnostics
Subtest 05 L2 Cache Memory
To test the L2 cache memory, a pass-through write-read comparison of ‘5A’
data is run repeatedly to the test area (‘7000’:’Program’ size to ‘7000’:’7FFF’
(32 KB)) to check the hit-miss ratio (on/off status) for L2 cache memory.
Number of misses < Number of hits → OK
Number of misses ≥ Number of hits → NG
Read/Write/ Compare data directly by G.A. operation for the TAG-RAM.
Subtest 06 Stress
This test prepares the write/read buffer (size:1b30h) and produce write date in
the write buffer. The write data is written in the area larger than 1 MB and
read into the read buffer then repeated to compare until maximum size.
Test data:
ffh, ffh, ffh, ffh, ffh
00h, 00h, 00h, 00h, 00h
ffh, ffh, ffh, 00h, ffh
00h, 00h, 00h, ffh, 00h
00h, ffh, ffh, ffh, ffh
00h, 00h, 00h, 00h, aah
These data are generated repeatedly by 1b30h size.
PORTEGE R100 Maintenance Manual (960-440) 3-13