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Chapter 3 Hardware
18 Reference Manual XTX 820
Address Range
(decimal)
Address Range
(hex)
Size Description
639 k - 640 k 9FC00 - 9FFFF 1 kB Extended BIOS data
0 - 639k 00000 - 9FC00 512 kB Conventional memory
Notes: T.O.M. = Top of memory = max. DRAM installed
* VGA frame buffer can be reduced to 1MB in setup.
** Only if ACPI Aware OS is set to YES in setup.
I/O Address Map
Table 3-3 list the I/O address map.
Table 3-3. I/O Address Map
I/O Address (hex) Size Available Description
0000 – 00FF 256 bytes No Baseboard resources
0100 – 0110 16 bytes No System Control
0170 – 0177 8 bytes No Secondary IDE channel
01F0 – 01F7 8 bytes No Primary IDE channels
0278 – 027F 8 bytes Note 2 Parallel Port 2 (LPT2)
02E8 – 02EF 8 bytes Note 2 Serial Port 4 (COM4)
02F8 – 02FF 8 bytes Note 1 Serial Port 2 (COM2)
0376 1 byte No Secondary IDE channel command port
0377 1 byte No Secondary IDE channel status port
0378 – 037F 8 bytes Note 1 Parallel Port 1 (LPT1)
03B0 – 03DF 16 bytes No Video system
03E8 – 03EF 8 bytes Note 2 Serial Port 3 (COM3)
03F0 – 03F5 6 bytes No Floppy channel 1
03F6 1 byte No Primary IDE channel command port
03F7 1 byte No Primary IDE channel status port
03F8 – 03FF 8 bytes Note 1 Serial Port 1 (COM1)
0480 – 04BF 64 bytes No Baseboard resources
04D0 – 04D1 2 bytes No Baseboard resources
0800 – 087F 128 bytes No Baseboard resources
0A00 – 0A0F 16 bytes No Baseboard resources
0CF8 – 0CFB 4 bytes No PCI configuration address register
0CFC – 0CFF 4 bytes No PCI configuration data register
0D00 – FFFF Note 3 PCI / PCI Express bus
Notes: 1. Default, but can be changed to another address range.
2. When baseboard external Super I/O controller is present.
3. The BIOS assigns PCI and PCI Express I/O resources from FFF0h downwards. Non
PnP/PCI/PCI Express compliant devices must not consume I/O resources in that area.