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SYSTEM CONTROL AND INITIALIZATION
After RESET, CS points
to
the top 64K bytes in the 16-Mbyte physical address space. Reloading CS
register by a control transfer
to
a different code segment
in
real address mode
will
put zeros
in
the
upper 4 bits. Since the initial IP
is
FFFOH, all of the upper 64K bytes of address space may be used
for initialization.
Sections
10.4.1 and 10.4.2 describe the steps needed
to
initialize the 80286
in
the real address mode
and the protected mode, respectively.
10.4.1
Real
Address Mode
1.
Allocate a stack.
2.
Load programs and data into memory from secondary storage.
3.
Initialize external devices and the Interrupt Vector Table.
4.
Set
registers and MSW bits
to
desired values.
5.
Set FLAG bits
to
desired values-including the IF bit
to
enable
interrupts-after
insuring that a
valid interrupt handler exists for each possible interrupt.
6.
Execute (usually via an inter-segment
JMP
to
the main system program).
10.4.2 Protected Mode
The full 80286 virtual address mode initialization procedure requires additional steps
to
operate correctly:
1.
Load programs and associated descriptor tables.
2.
Load valid GDT and IDT descriptor tables, setting the GDTR and IDTR
to
their correct value.
3.
Set the PE bit to enter protected mode.
4.
Execute an intra-segment
JMP
to
clear the processor queues.
5.
Load or construct a valid task state segment for the initial task to
be
executed
in
protected mode.
6.
Load the LDTR selector from the task's GDT or
OOOOH
(null) if an LDT
is
not needed.
7.
Set the stack pointer (SS, SP)
to
a valid location
in
a valid stack segment.
8.
Mark all items not
in
memory as not-present.
9.
Set FLAGS and MSW bits to correct values for the desired system configuation.
10.
Initialize external devices.
11.
Ensure that a valid interrupt handler exists for each possible interrupt.
12.
Enable interrupts.
13.
Execute.
The example in Appendix A
shows
the steps necessary
to
load all the required tables and registers that
permit execution of the first task of a protected mode system. The program
in
Appendix A assumes
that Intel development tools have been used
to
construct a prototype GDT, IDT, LDT, TSS, and all
the data segments necessary
to
start up that first task. Typically, these items are stored
on
EPROM;
on
most syslems it
is
necessary
to
copy them all into RAM
to
get going. Otherwise, the 80286
will
attempt
to
wrile into the EPROM
to
set the accessed or busy bits.
10-7