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CHAPTER 3
BASIC INSTRUCTION SET
!
The base architecture of the 80286
is
identical to the complete instruction set of the 8086, 8088,
80188, and 80186 processors. The 80286 instruction set includes new forms of some instructions. These
new forms reduce program size and improve the performance and ease of implementation of source
code.
This chapter describes the instructions which programmers can use to write application software for
the 80286. The following chapters describe the operation of more complicated
I/O
and system control
instructions.
All instructions described in this chapter are available for both Real Address Mode and Protected
Virtual Address Mode operation. The instruction descriptions note any differences that exist between
the operation of an instruction
in
these
two
modes.
This chapter also describes the operation of each application program-relative instruction and includes
an example of using the instruction. The Instruction Dictionary in Appendix B contains formal descrip-
tions of all instructions. Any opcode pattern that
is
not described
in
the Instruction Dictionary
is
undefined and results in an opcode violation trap (interrupt
6).
3.1 DATA MOVEMENT INSTRUCTIONS
These instructions provide convenient methods for moving bytes or words of data between memory and
the registers of the base architecture.
3.1.1
General-Purpose Data Movement Instructions
MOV
(Move) transfers a byte or a word from the source operand to the destination operand. The MOV
instruction
is
useful for transferring data to a register from memory,
to
memory from a register, between
registers, immediate-to-register, or immediate-to-memory. Memory-to-memory or segment register-to-
segment register moves are not allowed.
Example:
MOV DS,AX. Replaces the contents of register DS with the contents of register AX.
XCHG
(Exchange) swaps the contents of two operands. This instruction takes the place
of
three MOV
instructions.
It
does not require a temporary memory location to save the contents of one operand while
you
load the other.
The XCHG instruction can swap
two
byte operands or
two
word operands, but not a byte for a word
or a word for a byte. The operands for the XCHG instruction may be
two
register operands, or a
register operand with a memory operand. When used with a memory operand, XCHG automatically
activates the
LOCK signal.
Examplc: XCHG BX,WORDOPRND. Swaps the contents of register BX with the contents of the
memory word identified by the label
WORDOPRND after asserting bus lock.
3-1