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BASE
ARCHITECTURE
Most memory references
do
not require the instruction
to
specify a full 32-bit pointer address. Operands
that
are located within one of the currently addressable segments,
as
determined by the four segment
registers (see section 2.3.2,
"Segment Registers"), can be referenced very efficiently simply by means
of the 16-bit offset. This form of address
is
called by short address. The choice of segment (CS, DS,
ES,
or SS)
is
either implicit within the instruction itself or explicitly specified by means of a segment
override prefix (see below).
See figure
2-11
for a diagram of the addressing process.
2.4.3.1 SEGMENT SELECTION
All instructions that address operands in memory must specify the segment and the offset. For speed
and compact instruction encoding, segment selectors are usually stored in the high speed segment
registers. An instruction need specify only the desired segment register and an offset in order to address
a memory operand.
Most instructions need not explicitly specify which segment register
is
used. The correct segment regis-
ter
is
automatically chosen according to the rules of table
2-1
and table
2-2.
These rules follow the
way
programs are written (see figure 2-12)
as
independent modules that require areas for code and data, a
stack, and access to external data areas.
There
is
a close connection between the type of memory reference and the segment in which
that
operand resides (see the next section for a discussion of
how
memory addressing mode calculations are
performed).
As
a rule, a memory reference implies the current data segment (Le., the implicit segment
selector
is
in DS) unless the BP register
is
involved
in
the address specification, in which case the
current stack segment
is
implied (i.e,
SS
contains the selector).
POINTER
I SEGMENT OFFSET
31
16 15 0
-----r
~--~~------~
OPERAND
SELECTED SELECTED
SEGMENT
1
MEMORY
1
G3010B
Figure 2-11. Two-Component Address
2-18