Intel 80286 Computer Accessories User Manual


 
THE
80286
INSTRUCTION SET
The rotate
is
repeated the number of times indicated by the second operand, which
is
either an immedi-
ate number
or
the contents of the CL register.
To
reduce the maximum execution time, the 80286 does
not allow rotation counts greater than 31.
If
a rotation count greater than
31
is
attempted, only the
bottom
five
bits of the rotation are used. The 8086 does not mask rotate counts.
The overflow flag
is
set only for the single-rotate (second operand =
1)
forms of the instructions. The
OF
bit
is
set to be accurate if a shift of length 1
is
done. Since it
is
undefined for all other values,
including a zero shift, it can always
be
set for the count-of-1 case regardless of the actual count. For
left shifts/rotates, the
CF
bit after the shift
is
XORed with the high-order result bit. For right shifts/
rotates, the high-order
two
bits of the result are XORed to get OF. Neither flag bit
is
modified when
the count value
is
zero.
PROTECTED MODE EXCEPTIONS
#GP(O) if the result
is
in
a non-writable segment.
#GP(O)
for an illegal memory operand effective
address
in
the CS, DS, or ES segments;
#SS(O)
for an illegal address in the SS segment.
REAL ADDRESS MODE EXCEPTIONS
Interrupt
13
for a word operand at offset OFFFFH.
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