Intel 80286 Computer Accessories User Manual


 
80286
BASE
ARCHITECTURE
stack frame. The use of these general-purpose registers for operand addressing
is
discussed
in
section
2.3.3,
"Index, Pointer, and Base Registers." Register usage
for
individual instructions
is
discussed
in
chapters 3 and
4.
As
shown
in
figure
2-4,
eight byte registers overlap four of the 16-bit general registers. These registers
are named AH, BH, CH, and DH (high bytes); and AL, BL, CL, and DL
(low
bytes); they overlap
AX, BX, CX, and DX. These registers can be used either
in
their entirety or
as
individual 8-bit regis-
ters. This dual interpretation simplifies the handling of both
8-
and 16-bit data elements.
2.3.2
Memory Segmentation and Segment Registers
Complete programs generally consist of many different code modules (or segments), and different
types of data segments. However, at any given time during program execution, only a small subset of
a program's segments are actually
in
use. Generally, this subset
will
include code, data, and possibly a
stack. The 80286 architecture takes advantage of this
by
providing mechanisms
to
support direct access
to the working set of a program's execution environment and access
to
additional segments
on
demand.
At any given instant, four segments of memory are immediately accessible
to
an executing 80286
program. The segment registers
DS, ES, SS, and CS are used to identify these four current segments.
Each of these registers specifies a particular kind of segment,
as
characterized by the associated
mnemonics
("code," "stack," "data," or "extra") shown
in
figure
2-4.
An
executing program
is
provided with concurrent access to the four individual segments of
memory-
a code segment, a stack segment, and
two
data
segments-by
means of the four segment registers.
Each may be said to select a segment, since it uniquely determines the one particular segment from
among the numerous segments
in
memory, which
is
to be immediately accessible at highest speed.
Thus, the 16-bit contents of a segment register
is
called a segment selector.
Once a segment
is
selected, a base address
is
associated with it. To address an element within a segment,
a 16-bit offset from the segment's base address must be supplied. The 16-bit segment selector and the
16-bit offset taken together form the high and
low
order halves, respectively, of a 32-bit virtual address
pointer.
Once a segment
is
selected, only the lower 16-bits of the pointer, called the offset, generally
need to be
specified by an instruction. Simple rules define which segment register
is
used
to
form an
address when only a 16-bit offset
is
specified.
An executing program requires, first of all, that its instructions reside somewhere in memory. The
segment of memory containing the currently executing sequence
of
instructions
is
known
as
the current
code segment; it
is
specified by means of the CS register. All instructions are fetched from this code
segment, using
as
an offset the contents of the instruction pointer (IP). The CS:IP register combination
therefore forms the full 32-bit pointer for the next sequential program instruction. The
CS register
is
manipulated indirectly. Transitions from one code segment
to
another (e.g., a procedure call) are effected
implicitly
as
the result of control-transfer instructions, interrupts, and trap operations.
Stacks
playa
fundamental role
in
the 80286 architecture; subroutine calls, for example, involve a
number of implicit stack operations. Thus, an executing program
will
generally require a region of
memory for its stack. The segment containing this region
is
known as the current stack segment, and
it
is
specified by means of the SS register. All stack operations are performed within this segment,
usually
in
terms of address offsets contained
in
the stack pointer (SP) and stack frame base (BP)
registers. Unlike CS, the SS register can be loaded explicitly for dynamic stack definition.
2-8