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Rev.1.02 Jul 01, 2005 page 95 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 12. Timers
Under development
This document is under development and its contents are subject to change.
Item Specification
Count Source • External signals input to TAiIN pin (effective edge can be selected in program)
• Timer B2 overflows or underflows,
Timer Aj overflows or underflows,
Timer Ak overflows or underflows
Count Operation • Up-count or down-count can be selected by external signal or program
• When the timer overflows or underflows, it reloads the reload register
contents and continues counting. When operating in free-running mode,
the timer continues counting without reloading.
Divided Ratio 1/ (FFFFh - n + 1) for up-count
1/ (n + 1) for down-count n : set value of the TAi register 0000h to FFFFh
Count Start Condition Set the TAiS bit in the TABSR register to “1” (start counting)
Count Stop Condition Set the TAiS bit to “0” (stop counting)
Interrupt Request Generation Timing
Timer overflow or underflow
TAiIN Pin Function I/O port or count source input
TAiOUT Pin Function I/O port, pulse output, or up/down-count select input
Read from Timer Count value can be read by reading the TAi register
Write to Timer • When not counting and until the 1st count source is input after counting start
Value written to the TAi register is written to both reload register and counter
• When counting (after 1st count source input)
Value written to the TAi register is written to only reload register
(Transferred to counter when reloaded next)
Select Function • Free-run count function
Even when the timer overflows or underflows, the reload register content
is not reloaded to it
• Pulse output function
Whenever the timer underflows or underflows, the output polarity of
TAiOUT pin is inverted.
When TAiS bit is set to “0” (stop counting), the pin outputs a low.
12.1.2 Event Counter Mode
In event counter mode, the timer counts pulses from an external device or overflows and underflows of
other timers. Timers A2, A3 and A4 can count two-phase external signals. Table 12.2 lists specifications
in event counter mode (when not processing two-phase pulse signal). Figure 12.8 shows TAiMR register
in event counter mode (when not processing two-phase pulse signal). Table 12.3 lists specifications in
event counter mode (when processing two-phase pulse signal with the timers A2, A3 and A4). Figure
12.9 shows TA2MR to TA4MR registers in event counter mode (when processing two-phase pulse signal
with the timers A2, A3 and A4).
Table 12.2 Specifications in Event Counter Mode (when not processing two-phase pulse signal)
i = 0 to 4
j = i - 1, except j = 4 if i = 0
k = i + 1, except k = 0 if i = 4