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Rev.1.02 Jul 01, 2005 page 13 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 4. Special Function Register (SFR)
Under development
This document is under development and its contents are subject to change.
4. Special Function Register (SFR)
SFR (Special Function Register) is the control register of peripheral functions.
Tables 4.1 to 4.12 list the SFR information.
Table 4.1 SFR Information (1)
0000h
0001h
0002h
0003h
0004h
0005h
0006h
0007h
0008h
0009h
000Ah
000Bh
000Ch
000Dh
000Eh
000Fh
0010h
0011h
0012h
0013h
0014h
0015h
0016h
0017h
0018h
0019h
001Ah
001Bh
001Ch
001Dh
001Eh
001Fh
0020h
0021h
0022h
0023h
0024h
0025h
0026h
0027h
0028h
0029h
002Ah
002Bh
002Ch
002Dh
002Eh
002Fh
0030h
0031h
0032h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
003Ah
003Bh
003Ch
003Dh
003Eh
003Fh
Processor Mode Register 0
Processor Mode Register 1
System Clock Control Register 0
System Clock Control Register 1
Address Match Interrupt Enable Register
Protect Register
Oscillation Stop Detection Register
(1)
Watchdog Timer Start Register
Watchdog Timer Control Register
Address Match Interrupt Register 0
Address Match Interrupt Register 1
PLL Control Register 0
Processor Mode Register 2
DMA0 Source Pointer
DMA0 Destination Pointer
DMA0 Transfer Counter
DMA0 Control Register
DMA1 Source Pointer
DMA1 Destination Pointer
DMA1 Transfer Counter
DMA1 Control Register
PM0
PM1
CM0
CM1
AIER
PRCR
CM2
WDTS
WDC
RMAD0
RMAD1
PLC0
PM2
SAR0
DAR0
TCR0
DM0CON
SAR1
DAR1
TCR1
DM1CON
X: Undefined
NOTES:
1. The CM20, CM21, and CM27 bits in the CM2 register do not change at oscillation stop detection reset.
2. The blank areas are reserved and cannot be accessed by users.
Address Register Symbol After Reset
00h
00001000b
01001000b
00100000b
XXXXXX00b
XX000000b
0X000000b
XXh
00XXXXXXb
00h
00h
X0h
00h
00h
X0h
0001X010b
XXX00000b
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
00000X00b
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
00000X00b