Renesas 16-bit single-chip microcomputer Computer Hardware User Manual


 
Rev.1.02 Jul 01, 2005 page 58 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 9. Interrupt
Under development
This document is under development and its contents are subject to change.
9.3 Hardware Interrupts
Hardware interrupts are classified into two types special interrupts and peripheral function interrupts.
9.3.1 Special Interrupts
Special interrupts are non-maskable interrupts.
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9.3.1.1 NMI Interrupt
_______ _______
An NMI interrupt is generated when input on the NMI pin changes state from high to low. For details,
_______
refer to 9.7 NMI Interrupt.
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9.3.1.2 DBC Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development support
tools.
9.3.1.3 Watchdog Timer Interrupt
Generated by the watchdog timer. Once a watchdog timer interrupt is generated, be sure to initialize the
watchdog timer. For details about the watchdog timer, refer to 10. Watchdog Timer.
9.3.1.4 Oscillation Stop and Re-oscillation Detection Interrupt
Generated by the oscillation stop and re-oscillation detection function. For details about the oscillation
stop and re-oscillation detection function, refer to 7. Clock Generating Circuit.
9.3.1.5 Single-Step Interrupt
Do not normally use this interrupt because it is provided exclusively for use by development support
tools.
9.3.1.6 Address Match Interrupt
An address match interrupt is generated immediately before executing the instruction at the address
indicated by the RMAD0 to RMAD3 registers that corresponds to one of the AIER0 or AIER1 bit in the
AIER register or the AIER20 or AIER21 bit in the AIER2 register which is 1 (address match interrupt
enabled). For details, refer to 9.10 Address Match Interrupt.
9.3.2 Peripheral Function Interrupts
The peripheral function interrupt occurs when a request from the peripheral functions in the microcomputer
is acknowledged. The peripheral function interrupt is a maskable interrupt. See Table 9.2 Relocatable
Vector Tables about how the peripheral function interrupt occurs. Refer to the descriptions of each
function for details.