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Rev.1.02 Jul 01, 2005 page 72 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 9. Interrupt
Under development
This document is under development and its contents are subject to change.
Figure 9.13 IFSR2 Register
Interrupt Request Cause Select Register 2
RW
Symbol Address After Reset
IFSR2 01CFh X0000000b
RW
RW
RW
RW
RW
RW
RW
-
b7 b6 b5 b4 b3 b2 b1 b0
0 : Timer A2
1 : INT7
0 : CAN0 error
1 : key input
0 : Timer A3
1 : INT6
0 : Timer B1
1 : INT8
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
0 : One edge
1 : Both edges
IFSR20
Interrupt Request Cause
Select Bit
(5)
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
IFSR21
IFSR22
IFSR23
IFSR24
IFSR25
IFSR26
-
(b7)
Bit Name Function
Bit Symbol
Interrupt Request Cause
Select Bit
(2) (6)
Interrupt Request Cause
Select Bit
(3) (6)
Interrupt Request Cause
Select Bit
(4) (6)
INT6 Interrupt Polarity
Switching Bit
(1) (6)
INT7 Interrupt Polarity
Switching Bit
(1) (6)
INT8 Interrupt Polarity
Switching Bit
(1) (6)
NOTES:
1.When setting this bit to "1" (both edges), make sure the POL bit in the INT6IC to INT8IC registers are
set to "0" (falling edge). The INT6IC to INT8IC registers are only in the 128-pin version.
In the 100-pin version, make sure the INT6 to INT8 interrupt polarity switching bitis set to "0" (falling edge).
2.Timer A2 and INT7 share the vector and interrupt control register.
When using the timer A2 interrupt, set the IFSR20 bit to "0" (Timer A2). When using INT7 interrupt,
set the IFSR20 bit to "1" (INT7).
The INT7 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR20 bit to "0" (Timer A2).
3.Timer A3 and INT6 share the vector and interrupt control register.
When using the timer A3 interrupt, set the IFSR21 bit to "0" (Timer A3). When using INT6 interrupt,
set the IFSR21 bit to "1" (INT6).
The INT6 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR21 bit to "0" (Timer A3).
4.Timer B1 and INT8 share the vector and interrupt control register.
When using the timer B1 interrupt, set the IFSR22 bit to "0" (Timer B1). When using INT8 interrupt,
set the IFSR22 bit to "1" (INT8).
The INT8 interrupt is only in the 128-pin version. In the 100-pin version, set the IFSR22 bit to "0" (Timer B1).
5.When the PCLK6 bit in the PCLKR register = 1, CAN0 error and key input share the vector and
interrupt control register. When using the CAN0 error interrupt, set the IFSR26 bit to "0" (CAN0 error).
When using the key input interrupt, set the IFSR26 bit to "1" (key input).
6.When using the INT6 to INT8 interrupts, set these bits after settig the PU37 bit in the PUR3 register to "1".