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Rev.1.02 Jul 01, 2005 page 239 of 314
REJ09B0126-0102
M16C/6N Group (M16C/6NL, M16C/6NN) 20. Flash Memory Version
Under development
This document is under development and its contents are subject to change.
Item EW0 Mode EW1 Mode
Operation Mode • Single chip mode Single chip mode
• Boot mode
Space where Rewrite • User ROM area User ROM area
Control Program can be • Boot ROM area
Placed
Space where Rewrite The rewrite control program must be The rewrite control program can be
Control Program can be transferred to any space other than the executed in the user ROM area
Executed flash memory (e.g., RAM) before being
executed
(2)
Space which can be User ROM area User ROM area
Rewritten However, this excludes blocks with the
rewrite control program
Software Command None • Program and block erase commands
Restriction cannot be executed in a block having
the rewrite control program.
• Erase all unlocked block command
cannot be executed when the lock bit in
a block having the rewrite control program
is set to “1” (unlocked) or when the
FMR02 bit in the FMR0 register is set
to “1” (lock bit disabled).
• Read status register command cannot
be used
Modes after Program or Read status register mode Read array mode
Erasing
CPU Status during Auto Operating Maintains hold state (I/O ports maintains
Write and Auto Erase the state before the command was
executed)
(1)
Flash Memory Status •Read the FMR00, FMR06 and FMR07 Read the FMR00, FMR06 and FMR07
Detection bits in the FMR0 register by program bits in the FMR0 register by program
•Execute the read status register
command to read the SR7, SR5, and
SR4 bits in the status register
20.3 CPU Rewrite Mode
In CPU rewrite mode, the user ROM area can be rewritten when the CPU executes software commands.
The user ROM area can be rewritten with the microcomputer is mounted on a board without using a parallel,
serial or CAN programmer.
In CPU rewrite mode, only the user ROM area shown in Figure 20.1 can be rewritten. The boot ROM area
cannot be rewritten. Program and the block erase command are executed only in the user ROM area.
Erase-write 0 (EW0) mode and erase-write 1 (EW1) mode are provided as CPU rewrite mode.
Table 20.3 lists the differences between EW0 and EW1 modes.
Table 20.3 EW0 Mode and EW1 Mode
NOTES:
1.
_______
Do not generate an interrupts (except NMI and watchdog timer interrupts) and DMA transfer.
2. When in CPU rewrite mode, the PM10 and PM13 bits in the PM1 register are set to “1”. The rewrite
control program can only be executed in the internal RAM area.