Filter
Top Products
4.45FunctionAddressRegister(FADDR)
4.46PowerManagementRegister(POWER)
www.ti.com
Registers
Table60.ReceiveCPPICompletionPointer(RCPPICOMPPTR)FieldDescriptions(continued)
BitFieldValueDescription
0RDBK_MODEReadback/CompareMode
0CompareMode.Indicatesthatthevaluethatispresentedonbits31:2ofthereaddata
shouldbecomparedagainstthevaluethatiscurrentlycontainedinbits31:2ofthislocation.
Ifthetwomatch,theinterruptbitcorrespondingtothisReceiveQueueshouldbedeasserted.
1ReadbackMode.Indicatesthatthevaluethatispresentedonbits31:2ofthereaddata
shouldbereadfromthislocationandtheinterruptforthisReceiveQueueshouldbe
asserted.Thisbitisreadaszero.
TheFunctionAddressRegister(FADDR)isshowninFigure60anddescribedinTable61.
Figure60.FunctionAddressRegister(FADDR)
760
ReservedFUNCADDR
R-0R/W-0
LEGEND:R/W=Read/Write;-n=valueafterreset
Table61.FunctionAddressRegister(FADDR)FieldDescriptions
BitFieldValueDescription
7Reserved0Reserved
6-0FUNCADDR0-7Fh7-bitaddressoftheperipheralpartofthetransaction
WhenusedinPeripheralmode(DevCtl.D2=0),thisregistershouldbewrittenwiththeaddress
receivedthroughaSET_ADDRESScommand,whichwillthenbeusedfordecodingthefunction
addressinsubsequenttokenpackets.
WhenusedinHostmode(DevCtl.D2=1),thisregistershouldbesettothevaluesentina
SET_ADDRESScommandduringdeviceenumerationastheaddressfortheperipheraldevice.
ThePowerManagementRegister(POWER)isshowninFigure61anddescribedinTable62.
Figure61.PowerManagementRegister(POWER)
76543210
ISOUPDATESOFTCONNHSENHSMODERESETRESUMESUSPENDMENSUSPM
R/W-0R/W-0R/W-1R-0R/W-0R/W-0R/W-0R/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table62.PowerManagementRegister(POWER)FieldDescriptions
BitFieldValueDescription
7ISOUPDATE0-1Whenset,theUSBcontrollerwillwaitforanSOFtokenfromthetimeTxPktRdyissetbefore
sendingthepacket.IfanINtokenisreceivedbeforeanSOFtoken,thenazerolengthdatapacket
willbesent.Note:ThisisonlyvalidinPeripheralMode.Thisbitonlyaffectsendpointsperforming
Isochronoustransfers.
6SOFTCONN0-1IfSoftConnect/Disconnectfeatureisenabled,thentheUSBD+/D-linesareenabledwhenthisbit
issetandtri-statedwhenthisbitiscleared.Note:ThisisonlyvalidinPeripheralMode.
5HSEN0-1Whenset,theUSBcontrollerwillnegotiateforhigh-speedmodewhenthedeviceisresetbythe
hub.Ifnotset,thedevicewillonlyoperateinfull-speedmode.
4HSMODE0-1ThisbitissetwhentheUSBcontrollerhassuccessfullynegotiatedforhigh-speedmode.
SPRUGH3–November2008UniversalSerialBus(USB)Controller111
SubmitDocumentationFeedback