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3.3.1.4TransmitQueue
SOP descriptor Buffer
Descriptor Buffer
EOP descriptor Buffer
Tx queue head descriptor pointer
3.3.1.5Operation
USBControllerHostandPeripheralModesOperation
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Figure14showsaTxqueue.TxqueueprovidealogicalqueueofDMApacketsfortransmissionthrough
achannel.EachchannelhasonededicatedTxqueues.ThequeuehasoneassociatedTxQueueHead
DescriptorPointerandoneassociatedTxCompletionPointercontainerinthechannelTxDMAstate.The
TxqueueislinkedlistsofTxbufferdescriptorsthatconstituteoneormorepacketsqueuedfor
transmission.Packetsareaddedtothetailofthelistbythesoftwareandpacketsarefreedfromthehead
ofthelistbytheDMAcontrolleraseachpackettransmissioniscompleted.
Figure14.TxQueueFlowChart
•AfterresetthesoftwaremustwritezeroestoallTxDMAStateregisters(TCPPIDMASTATEW0,
TCPPIDMASTATEW1,TCPPIDMASTATEW2,TCPPIDMASTATEW3,TCPPIDMASTATEW4,
TCPPIDMASTATEW5).
•Thesoftwareconstructstransmitqueuesinmemory(oneormoreDMApacketsfortransmission)
•EnableDMAfortheendpointinthePERI_TXCSRorHOST_TXCSRbysettingtheDMAENbit.
•EnabletheDMAportsbysettingTCPPI_ENABLEbitofTCPPICRregister.
•WritetheheadofthequeuedescriptorpointertotheTCPPIDMASTATEW0registertostarttheDMA.
•TheUSBcontrollerwillstarttransmittingdata.InterruptassociatedwiththeDMAchannelisasserted,
aftereachDMApacketistransmitted.
Foreachbufferaddedtoatransmitqueue,thesoftwaremustinitializetheTxbufferdescriptorvaluesas
follows:
•WritetheNextDescriptorPointerwiththe32-bitalignedaddressofthenextdescriptorinthequeue
(zeroiflastdescriptor)
•WritetheBufferPointerwiththebytealignedaddressofthebufferdata
•WritetheBufferLengthwiththenumberofbytesinthebuffer
•WritetheBufferOffsetwiththenumberofbytesintheoffsettothedata(nonzerowithSOPonly)
•SettheSOP,EOP,andOwnershipbitsasappropriate
•CleartheEndOfQueuebit
TheDMAcontrollerbeginsTxDMApackettransmissiononagivenchannelwhenthehostwritesthe
channel’sTxqueueheaddescriptorpointerwiththeaddressofthefirstbufferdescriptorinthequeue
(nonzerovalue).Eachchannelhasonequeueandaheaddescriptorpointer.Thefirstbufferdescriptorfor
eachTxDMApacketmusthavetheStartofPacket(SOP)bitandtheOwnershipbitsettoonebythe
software.ThelastbufferdescriptorforeachTxDMApacketmusthavetheEndofPacket(EOP)bitsetto
onebythesoftware.TheDMAcontrollerwilltransmitDMApacketsuntilallqueuedpacketshavebeen
transmittedandthequeueisempty.Wheneachpackettransmissioniscomplete,theDMAcontrollerwill
60UniversalSerialBus(USB)ControllerSPRUGH3–November2008
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