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3.3DMAOperation
3.3.1DMATransmitOperation
3.3.1.1TransmitBuffer
3.3.1.2CPPITransmitBufferDescriptor
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USBControllerHostandPeripheralModesOperation
3.2.4.2.2Operation
TheoperationstartswhenthesoftwarewritestotheFIFOandsetsTXPKTRDYbitofHOST_TXCSR
(bit0).ThistriggersthecontrollertosendanOUTtokenfollowedbythefirstdatapacketfromtheFIFO.
Aninterruptisgeneratedwheneverapacketissentandthesoftwaremayusethisinterrupttoloadthe
nextpacketintotheFIFOandsettheTXPKTRDYbitintheHOST_TXCSRregister(bit0)inthesame
wayasforaBulkTxendpoint.Astheinterruptcouldoccuralmostanytimewithinaframe,dependingon
whenthehosthasscheduledthetransaction,thismayresultinirregulartimingofFIFOloadrequests.If
thedatasourcefortheendpointiscomingfromsomeexternalhardware,itmaybemoreconvenientto
waituntiltheendofeachframebeforeloadingtheFIFOasthiswillminimizetherequirementfor
additionalbuffering.ThiscanbedonebyusingtheSOF_PULSEsignalfromthecontrollertotriggerthe
loadingofthenextdatapacket.TheSOF_PULSEisgeneratedonceperframe(/microframe).The
interruptsmaystillbeusedtosettheTXPKTRDYbitinHOST_TXCSR.
TheDMAcontrollersub-moduleisacommon4dual-channelDMAcontroller.Itsupports4TXand4RX
channels,andeachchannelattachestotheassociatedendpointinthecontroller.Channel0mapsto
Endpoint1uptoChannel3mappingtoEndpoint4,whileendpoint0cannotutilizetheDMA.TheDMAis
programmedthroughparametersstoredintheDMAregisters,andimplementsDMAsthroughthebuffer
descriptorchainsstoredinmainmemory.TheDMAutilizesincrementingaddressingmode,andcanburst
upto64bytes.WhenaDMAisinitiated,theDMAcontrollerreadsthecurrentparametersforthatchannel
fromtheDMAregisters,readstheCPPIbufferdescriptorpointedtobytheparameters,andperformsthe
DMAusingthedatabufferinthedescriptor.TheDMAcontrollerupdatesandsavestheDMAparameters
whenthedataiscompleted.Thesoftwarecanaccessthecurrentparametersatanytimebyaccessing
theDMAregisters.
TheDMAcontrollerhasaconceptofDMApacketswhichisdifferentfromtheUSBpackets.ADMA
packetcanbe(butnotnecessarily)ofthesamesizeasUSBpacket.EachDMApacketcancompriseof
oneormultipledatabuffers.EachDMAchannelcanprocessoneormultiplechainsoftheseDMA
packets.
ThecontrollersupportstwomodesofDMA:transparentmodeandRNDISmode.Transparentmodewill
interrupttheCPUforeveryUSBdatapacket,whileRNDISmodecanservicemultipleUSBpacketswith
onlyasingleCPUinterrupt.
Fortransmitoperation,thesoftwarehastoprogramtheDMAchannelwithachainoftransmitbuffers.
ATransmitbufferisacontiguousblockofmemoryusedtostoredatafortransmission.EachTxbufferhas
acorrespondingTxbufferdescriptor.EachTxbuffercanbelinkedtogetherwithotherTxbufferstomake
aDMApacketoraqueueofDMApackets.
Transmitbuffersarebytealignedstructureslocatedinprocessor’smainmemory.Txbuffersizemayvary
from1to65,535bytes.
TxbufferdescriptorsprovideinformationaboutasinglecorrespondingTxdatabuffer.EveryTxbufferhas
asingleTxbufferdescriptorthatstoresthefollowinginformation:
•Pointertothedatabuffer
•Pointertothenextbufferdescriptorinthequeue
•Bufferlengthandoffsettothefirstvalidbyteofbufferdata
•StartofDMApacket(SOP)indicator
•EndofDMApacket(EOP)indicator
•Ownership(onlyvalidwithSOP)
SPRUGH3–November2008UniversalSerialBus(USB)Controller57
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