Texas Instruments TMS320DM357 Switch User Manual


 
3.1.1.1ZeroDataRequests
3.1.1.2WriteRequests
www.ti.com
USBControllerHostandPeripheralModesOperation
Note:TheSetuppacketassociatedwithanystandarddevicerequestshouldincludean8-byte
command.Anysetuppacketcontainingacommandfieldofanythingotherthan8byteswill
beautomaticallyrejectedbythecontroller.
Zerodatarequestshavealltheirinformationincludedinthe8-bytecommandandrequirenoadditional
datatobetransferred.ExamplesofZeroDatastandarddevicerequestsare:
SET_FEATURE
CLEAR_FEATURE
SET_ADDRESS
SET_CONFIGURATION
SET_INTERFACE
Thesequenceofeventswillbegin,aswithallrequests,whenthesoftwarereceivesanendpoint0
interrupt.TheRXPKTRDYbitofPERI_CSR0(bit0)willalsohavebeenset.The8-bytecommandshould
thenbereadfromtheendpoint0FIFO,decodedandtheappropriateactiontaken.
Forexample,ifthecommandisSET_ADDRESS,the7-bitaddressvaluecontainedinthecommand
shouldbewrittentotheFADDRregister.ThePERI_CSR0registershouldthenbewrittentosetthe
SERV_RXPKTRDYbit(bit6)(indicatingthatthecommandhasbeenreadfromtheFIFO)andtosetthe
DATAENDbit(bit3)(indicatingthatnofurtherdataisexpectedforthisrequest).Theintervalbetween
settingSERV_RXPKTRDYbitandDATAENDbitshouldbeverysmalltoavoidgettingaSetupEnderror
condition.
Whenthehostmovestothestatusstageoftherequest,asecondendpoint0interruptwillbegeneratedto
indicatethattherequesthascompleted.Nofurtheractionisrequiredfromthesoftware.Thesecond
interruptisjustaconfirmationthattherequestcompletedsuccessfully.ForSET_ADDRESScommand,
theaddressshouldbesetinFADDRregisteronlyafterthestatusstageinterruptisreceived.
Ifthecommandisanunrecognizedcommand,orforsomeotherreasoncannotbeexecuted,thenwhenit
hasbeendecoded,thePERI_CSR0registershouldbewrittentosettheSERV_RXPKTRDYbit(bit6)and
tosettheSENDSTALLbit(bit5).Whenthehostmovestothestatusstageoftherequest,thecontroller
willsendaSTALLtotellthehostthattherequestwasnotexecuted.Asecondendpoint0interruptwillbe
generatedandtheSENTSTALLbit(bit2ofPERI_CSR0)willbeset.
IfthehostsendsmoredataaftertheDATAENDbithasbeenset,thenthecontrollerwillsendaSTALL.
Anendpoint0interruptwillbegeneratedandtheSENTSTALLbit(bit2ofPERI_CSR0)willbeset.
Note:DMAisnotsupportedforendpoint0,sothecommandshouldbereadbyaccessingthe
endpoint0FIFOregister.
Writerequestsinvolveanadditionalpacket(orpackets)ofdatabeingsentfromthehostafterthe8-byte
command.AnexampleofaWritestandarddevicerequestis:SET_DESCRIPTOR.
Thesequenceofeventswillbegin,aswithallrequests,whenthesoftwarereceivesanendpoint0
interrupt.TheRXPKTRDYbitofPERI_CSR0willalsohavebeenset.The8-bytecommandshouldthen
bereadfromtheEndpoint0FIFOanddecoded.
Aswithazerodatarequest,thePERI_CSR0registershouldthenbewrittentosettheSERV_RXPKTRDY
bit(bit6)(indicatingthatthecommandhasbeenreadfromtheFIFO)butinthiscasetheDATAENDbit
(bit3)shouldnotbeset(indicatingthatmoredataisexpected).
Whenasecondendpoint0interruptisreceived,thePERI_CSR0registershouldbereadtocheckthe
endpointstatus.TheRXPKTRDYbitofPERI_CSR0shouldbesettoindicatethatadatapackethasbeen
received.TheCOUNT0registershouldthenbereadtodeterminethesizeofthisdatapacket.Thedata
packetcanthenbereadfromtheendpoint0FIFO.
SPRUGH3November2008UniversalSerialBus(USB)Controller27
SubmitDocumentationFeedback