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3.1.2.2PeripheralMode:BulkOUTTransactions
USBControllerHostandPeripheralModesOperation
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3.1.2.1.2Operation
WhendataistobetransferredoveraBulkINpipe,adatapacketneedstobeloadedintotheFIFOand
thePERI_TXCSRregisterwrittentosettheTXPKTRDYbit(bit0).Whenthepackethasbeensent,the
TXPKTRDYbitwillbeclearedbytheUSBcontrollerandaninterruptgeneratedsothatthenextpacket
canbeloadedintotheFIFO.Ifdoublepacketbufferingisenabled,thenafterthefirstpackethasbeen
loadedandtheTXPKTRDYbitset,theTXPKTRDYbitwillimmediatelybeclearedbytheUSBcontroller
andaninterruptgeneratedsothatasecondpacketcanbeloadedintotheFIFO.Thesoftwareshould
operateinthesameway,loadingapacketwhenitreceivesaninterrupt,regardlessofwhetherdouble
packetbufferingisenabledornot.
Inthegeneralcase,thepacketsizemustnotexceedthesizespecifiedbythelower11bitsofthe
TXMAXPregister.Thispartoftheregisterdefinesthepayload(packetsize)fortransfersovertheUSB
andisrequiredbytheUSBSpecificationtobeeither8,16,32,64(Full-SpeedorHigh-Speed)or512
bytes(High-Speedonly).
Thehostmaydeterminethatallthedataforatransferhasbeensentbyknowingthetotalamountofdata
thatisexpected.Alternativelyitmayinferthatallthedatahasbeensentwhenitreceivesapacketwhich
issmallerthanthestatedpayload(TXMAXP[bit10:bit0]).Inthelattercase,ifthetotalsizeofthedata
blockisamultipleofthispayload,itwillbenecessaryforthefunctiontosendanullpacketafterallthe
datahasbeensent.ThisisdonebysettingTXPKTRDYwhenthenextinterruptisreceived,without
loadinganydataintotheFIFO.
Iflargeblocksofdataarebeingtransferred,thentheoverheadofcallinganinterruptserviceroutineto
loadeachpacketcanbeavoidedbyusingDMA.
3.1.2.1.3ErrorHandling
IfthesoftwarewantstoshutdowntheBulkINpipe,itshouldsettheSENDSTALLbit(bit4of
PERI_TXCSR).WhenthecontrollerreceivesthenextINtoken,itwillsendaSTALLtothehost,setthe
SENTSTALLbit(bit5ofPERI_TXCSR)andgenerateaninterrupt.
WhenthesoftwarereceivesaninterruptwiththeSENTSTALLbit(bit5ofPERI_TXCSR)set,itshould
cleartheSENTSTALLbit.ItshouldhoweverleavetheSENDSTALLbitsetuntilitisreadytore-enablethe
BulkINpipe.
Note:IfthehostfailedtoreceivetheSTALLpacketforsomereason,itwillsendanotherINtoken,
soitisadvisabletoleavetheSENDSTALLbitsetuntilthesoftwareisreadytore-enablethe
BulkINpipe.Whenapipeisre-enabled,thedatatogglesequenceshouldberestartedby
settingtheCLRDATATOGbitinthePERI_TXCSRregister(bit6).
ABulkOUTtransactionisusedtotransfernon-periodicdatafromthehosttothefunctioncontroller.
ThefollowingoptionalfeaturesareavailableforusewithanRxendpointusedinperipheralmodeforBulk
OUTtransactions:
•Doublepacketbuffering:Whenenabled,uptotwopacketscanbestoredintheFIFOonreception
fromthehost.DoublepacketbufferingisenabledbysettingtheDPBbitoftheRXFIFOSZregister(bit
4).
•DMA:IfDMAisenabledfortheendpoint,aDMArequestwillbegeneratedwhenevertheendpointhas
apacketinitsFIFO.ThisfeaturecanbeusedtoallowtheDMAcontrollertounloadpacketsfromthe
FIFOwithoutprocessorintervention.
WhenDMAisenabled,endpointinterruptwillnotbegeneratedforcompletionofpacketreception.
Endpointinterruptwillbegeneratedonlyintheerrorconditions.
38UniversalSerialBus(USB)ControllerSPRUGH3–November2008
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