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4.17TransmitCPPIMaskedStatusRegister(TCPPIMSKSR)..........................................................95
4.18TransmitCPPIRawStatusRegister(TCPPIRAWSR).............................................................95
4.19TransmitCPPIInterruptEnableSetRegister(TCPPIIENSETR).................................................96
4.20TransmitCPPIInterruptEnableClearRegister(TCPPIIENCLRR)...............................................96
4.21ReceiveCPPIControlRegister(RCPPICR).........................................................................97
4.22ReceiveCPPIMaskedStatusRegister(RCPPIMSKSR)..........................................................97
4.23ReceiveCPPIRawStatusRegister(RCPPIRAWSR)..............................................................98
4.24ReceiveCPPIInterruptEnableSetRegister(RCPPIENSETR)...................................................98
4.25ReceiveCPPIInterruptEnableClearRegister(RCPPIIENCLRR)...............................................99
4.26ReceiveBufferCount0Register(RBUFCNT0).....................................................................99
4.27ReceiveBufferCount1Register(RBUFCNT1)....................................................................100
4.28ReceiveBufferCount2Register(RBUFCNT2)....................................................................100
4.29ReceiveBufferCount3Register(RBUFCNT3)....................................................................101
4.30TransmitCPPIDMAStateWord0(TCPPIDMASTATEW0).....................................................101
4.31TransmitCPPIDMAStateWord1(TCPPIDMASTATEW1).....................................................102
4.32TransmitCPPIDMAStateWord2(TCPPIDMASTATEW2).....................................................102
4.33TransmitCPPIDMAStateWord3(TCPPIDMASTATEW3).....................................................103
4.34TransmitCPPIDMAStateWord4(TCPPIDMASTATEW4).....................................................103
4.35TransmitCPPIDMAStateWord5(TCPPIDMASTATEW5).....................................................104
4.36TransmitCPPICompletionPointer(TCPPICOMPPTR)..........................................................104
4.37ReceiveCPPIDMAStateWord0(RCPPIDMASTATEW0)......................................................105
4.38ReceiveCPPIDMAStateWord1(RCPPIDMASTATEW1)......................................................105
4.39ReceiveCPPIDMAStateWord2(RCPPIDMASTATEW2)......................................................107
4.40ReceiveCPPIDMAStateWord3(RCPPIDMASTATEW3)......................................................107
4.41ReceiveCPPIDMAStateWord4(RCPPIDMASTATEW4)......................................................109
4.42ReceiveCPPIDMAStateWord5(RCPPIDMASTATEW5)......................................................109
4.43ReceiveCPPIDMAStateWord6(RCPPIDMASTATEW6)......................................................110
4.44ReceiveCPPICompletionPointer(RCPPICOMPPTR)...........................................................110
4.45FunctionAddressRegister(FADDR)................................................................................111
4.46PowerManagementRegister(POWER)............................................................................111
4.47InterruptRegisterforEndpoint0PlusTransmitEndpoints1to4(INTRTX)...................................112
4.48InterruptRegisterforReceiveEndpoints1to4(INTRRX).......................................................112
4.49InterruptEnableRegisterforINTRTX(INTRTXE).................................................................113
4.50InterruptEnableRegisterforINTRRX(INTRRXE)................................................................113
4.51InterruptRegisterforCommonUSBInterrupts(INTRUSB)......................................................115
4.52InterruptEnableRegisterforINTRUSB(INTRUSBE).............................................................116
4.53FrameNumberRegister(FRAME)..................................................................................117
4.54IndexRegisterforSelectingtheEndpointStatusandControlRegisters(INDEX)............................117
4.55RegistertoEnabletheUSB2.0TestModes(TESTMODE).....................................................118
4.56MaximumPacketSizeforPeripheral/HostTransmitEndpoint(TXMAXP).....................................119
4.57ControlStatusRegisterforEndpoint0inPeripheralMode(PERI_CSR0).....................................120
4.58ControlStatusRegisterforEndpoint0inHostMode(HOST_CSR0).........................................121
4.59ControlStatusRegisterforPeripheralTransmitEndpoint(PERI_TXCSR)....................................122
4.60ControlStatusRegisterforHostTransmitEndpoint(HOST_TXCSR).........................................123
4.61MaximumPacketSizeforPeripheralHostReceiveEndpoint(RXMAXP).....................................124
4.62ControlStatusRegisterforPeripheralReceiveEndpoint(PERI_RXCSR).....................................125
4.63ControlStatusRegisterforHostReceiveEndpoint(HOST_RXCSR).........................................126
4.64Count0Register(COUNT0)..........................................................................................128
4.65ReceiveCountRegister(RXCOUNT)...............................................................................128
4ContentsSPRUGH3–November2008
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