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3.1.1.3ReadRequests
USBControllerHostandPeripheralModesOperation
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Ifthelengthofthedataassociatedwiththerequest(indicatedbythewLengthfieldinthecommand)is
greaterthanthemaximumpacketsizeforendpoint0,furtherdatapacketswillbesent.Inthiscase,
PERI_CSR0shouldbewrittentosettheSERV_RXPKTRDYbit,buttheDATAENDbitshouldnotbeset.
Whenalltheexpecteddatapacketshavebeenreceived,thePERI_CSR0registershouldbewrittentoset
theSERV_RXPKTRDYbitandtosettheDATAENDbit(indicatingthatnomoredataisexpected).
Whenthehostmovestothestatusstageoftherequest,anotherendpoint0interruptwillbegeneratedto
indicatethattherequesthascompleted.Nofurtheractionisrequiredfromthesoftware,theinterruptis
justaconfirmationthattherequestcompletedsuccessfully.
Ifthecommandisanunrecognizedcommand,orforsomeotherreasoncannotbeexecuted,thenwhenit
hasbeendecoded,thePERI_CSR0registershouldbewrittentosettheSERV_RXPKTRDYbit(bit6)and
tosettheSENDSTALLbit(bit5).Whenthehostsendsmoredata,thecontrollerwillsendaSTALLtotell
thehostthattherequestwasnotexecuted.Anendpoint0interruptwillbegeneratedandtheSENTSTALL
bitofPERI_CSR0(bit2)willbeset.
IfthehostsendsmoredataaftertheDATAENDhasbeenset,thenthecontrollerwillsendaSTALL.An
endpoint0interruptwillbegeneratedandtheSENTSTALLbitofPERI_CSR0(bit2)willbeset.
Readrequestshaveapacket(orpackets)ofdatasentfromthefunctiontothehostafterthe8-byte
command.ExamplesofReadStandardDeviceRequestsare:
•GET_CONFIGURATION
•GET_INTERFACE
•GET_DESCRIPTOR
•GET_STATUS
•SYNCH_FRAME
Thesequenceofeventswillbegin,aswithallrequests,whenthesoftwarereceivesanendpoint0
interrupt.TheRXPKTRDYbitofPERI_CSR0(bit0)willalsohavebeenset.The8-bytecommandshould
thenbereadfromtheendpoint0FIFOanddecoded.ThePERI_CSR0registershouldthenbewrittento
settheSERV_RXPKTRDYbit(bit6)(indicatingthatthecommandhasreadfromtheFIFO).
Thedatatobesenttothehostshouldthenbewrittentotheendpoint0FIFO.Ifthedatatobesentis
greaterthanthemaximumpacketsizeforendpoint0,onlythemaximumpacketsizeshouldbewrittento
theFIFO.ThePERI_CSR0registershouldthenbewrittentosettheTXPKTRDYbit(bit1)(indicatingthat
thereisapacketintheFIFOtobesent).Whenthepackethasbeensenttothehost,anotherendpoint0
interruptwillbegeneratedandthenextdatapacketcanbewrittentotheFIFO.
WhenthelastdatapackethasbeenwrittentotheFIFO,thePERI_CSR0registershouldbewrittentoset
theTXPKTRDYbitandtosettheDATAENDbit(bit3)(indicatingthatthereisnomoredataafterthis
packet).
Whenthehostmovestothestatusstageoftherequest,anotherendpoint0interruptwillbegeneratedto
indicatethattherequesthascompleted.Nofurtheractionisrequiredfromthesoftware:theinterruptis
justaconfirmationthattherequestcompletedsuccessfully.
Ifthecommandisanunrecognizedcommand,orforsomeotherreasoncannotbeexecuted,thenwhenit
hasbeendecoded,thePERI_CSR0registershouldbewrittentosettheSERV_RXPKTRDYbit(bit6)and
tosettheSENDSTALLbit(bit5).Whenthehostrequestsdata,thecontrollerwillsendaSTALLtotellthe
hostthattherequestwasnotexecuted.Anendpoint0interruptwillbegeneratedandtheSENTSTALLbit
ofPERI_CSR0(bit2)willbeset.
IfthehostrequestsmoredataafterDATAEND(bit3)hasbeenset,thenthecontrollerwillsendaSTALL.
Anendpoint0interruptwillbegeneratedandtheSENTSTALLbitofPERI_CSR0(bit2)willbeset.
UniversalSerialBus(USB)Controller 28SPRUGH3–November2008
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