Texas Instruments TMS320DM357 Switch User Manual


 
3.1.4.2IsochronousOUTTransactions
USBControllerHostandPeripheralModesOperation
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Aninterruptisgeneratedwheneverapacketissenttothehostandthesoftwaremayusethisinterruptto
loadthenextpacketintotheFIFOandsettheTXPKTRDYbitinthePERI_TXCSRregister(bit0)inthe
samewayasforaBulkTxendpoint.Astheinterruptcouldoccuralmostanytimewithina
frame(/microframe),dependingonwhenthehosthasscheduledthetransaction,thismayresultin
irregulartimingofFIFOloadrequests.Ifthedatasourcefortheendpointiscomingfromsomeexternal
hardware,itmaybemoreconvenienttowaituntiltheendofeachframe(/microframe)beforeloadingthe
FIFOasthiswillminimizetherequirementforadditionalbuffering.Thiscanbedonebyusingeitherthe
SOFinterruptortheexternalSOF_PULSEsignalfromthecontrollertotriggertheloadingofthenextdata
packet.TheSOF_PULSEisgeneratedonceperframe(/microframe)whenaSOFpacketisreceived.(The
controlleralsomaintainsanexternalframe(/microframe)countersoitcanstillgenerateaSOF_PULSE
whentheSOFpackethasbeenlost.)TheinterruptsmaystillbeusedtosettheTXPKTRDYbitin
PERI_TXCSR(bit0)andtocheckfordataoverruns/underruns.
Startingupadouble-bufferedIsochronousINpipecanbeasourceofproblems.Doublebufferingrequires
thatadatapacketisnottransmitteduntiltheframe(/microframe)afteritisloaded.Thereisnoproblemif
thefunctionloadsthefirstdatapacketatleastaframe(/microframe)beforethehostsetsupthepipe(and
thereforestartssendingINtokens).ButifthehosthasalreadystartedsendingINtokensbythetimethe
firstpacketisloaded,thepacketmaybetransmittedinthesameframe(/microframe)asitisloaded,
dependingonwhetheritisloadedbefore,orafter,theINtokenisreceived.Thispotentialproblemcanbe
avoidedbysettingtheISOUPDATEbitinthePOWERregister(bit7).Whenthisbitisset,anydatapacket
loadedintoanIsochronousTxendpointFIFOwillnotbetransmitteduntilafterthenextSOFpackethas
beenreceived,therebyensuringthatthedatapacketisnotsenttooearly.
3.1.4.1.3ErrorHandling
IftheendpointhasnodatainitsFIFOwhenanINtokenisreceived,itwillsendanulldatapackettothe
hostandsettheUNDERRUNbitinthePERI_TXCSRregister(bit2).Thisisanindicationthatthe
softwareisnotsupplyingdatafastenoughforthehost.Itisuptotheapplicationtodeterminehowthis
errorconditionishandled.
Ifthesoftwareisloadingonepacketperframe(/microframe)anditfindsthattheTXPKTRDYbitinthe
PERI_TXCSRregister(bit0)issetwhenitwantstoloadthenextpacket,thisindicatesthatadatapacket
hasnotbeensent(perhapsbecauseanINtokenfromthehostwascorrupted).Itisuptotheapplication
howithandlesthiscondition:itmaychoosetoflushtheunsentpacketbysettingtheFLUSHFIFObitin
thePERI_TXCSRregister(bit3),oritmaychoosetoskipthecurrentpacket.
AnIsochronousOUTtransactionisusedtotransferperiodicdatafromthehosttothefunctioncontroller.
FollowingoptionalfeaturesareavailableforusewithanRxendpointusedinPeripheralmodefor
IsochronousOUTtransactions:
Doublepacketbuffering:Whenenabled,uptotwopacketscanbestoredintheFIFOonreception
fromthehost.DoublepacketbufferingisenabledbysettingtheDPBbitofRXFIFOSZregister(bit4).
Note:DoublepacketbufferingisgenerallyadvisableforIsochronoustransactionsinordertoavoid
Overrunerrors.
DMA:IfDMAisenabledfortheendpoint,aDMArequestwillbegeneratedwhenevertheendpointhas
apacketinitsFIFO.ThisfeaturecanbeusedtoallowtheDMAcontrollertounloadpacketsfromthe
FIFOwithoutprocessorintervention.
However,thisfeatureisnotparticularlyusefulwithIsochronousendpointsbecausethepackets
transferredareoftennotmaximumpacketsizeandthePERI_RXCSRregisterneedstobeaccessed
followingeverypackettocheckforOverrunorCRCerrors.
WhenDMAisenabled,endpointinterruptwillnotbegeneratedforcompletionofpacketreception.
Endpointinterruptwillbegeneratedonlyintheerrorconditions.
42UniversalSerialBus(USB)ControllerSPRUGH3November2008
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