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4.17TransmitCPPIMaskedStatusRegister(TCPPIMSKSR)
4.18TransmitCPPIRawStatusRegister(TCPPIRAWSR)
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Registers
TheTransmitCPPIMaskedStatusRegister(TCPPIMSKSR)isshowninFigure32anddescribedin
Table33.
Figure32.TransmitCPPIMaskedStatusRegister(TCPPIMSKSR)
3116
Reserved
R-0
15430
ReservedMASKEDCOMP_PENDING
R-0R-0
LEGEND:R=Readonly;-n=valueafterreset
Table33.TransmitCPPIMaskedStatusRegister(TCPPIMSKSR)FieldDescriptions
BitFieldValueDescription
31-4Reserved0Reserved
3-0MASKEDCOMP_PENDING0-FhMaskedHighPriorityTransmitCompletionPending
Indicatorsforchannels3to0RawTransmithighprioritycompletionindicatorsbitwise
andedwithTransmithighprioritycompletionmaskbits
TheTransmitCPPIRawStatusRegister(TCPPIRAWSR)isshowninFigure33anddescribedin
Table34.
Figure33.TransmitCPPIRawStatusRegister(TCPPIRAWSR)
3116
Reserved
R-0
15430
ReservedCOMP_PENDING
R-0R-0
LEGEND:R=Readonly;-n=valueafterreset
Table34.TransmitCPPIRawStatusRegister(TCPPIRAWSR)FieldDescriptions
BitFieldValueDescription
31-4Reserved0Reserved
3-0COMP_PENDING0-FhRawHighPriorityTransmitCompletionPending
Indicatorsforchannels3to0Activehighflagswhichindicatethatapackethascompleted
transmissiononthehighpriorityqueue
SPRUGH3–November2008UniversalSerialBus(USB)Controller95
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