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3.2.2.2BulkOUTTransactions
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USBControllerHostandPeripheralModesOperation
3.2.2.1.2Operation
WhenBulkdataisrequiredfromtheUSBperipheraldevice,thesoftwareshouldsettheREQPKTbitin
thecorrespondingHOST_RXCSRregister(bit5).ThecontrollerwillthensendanINtokentotheselected
peripheralendpointandwaitsfordatatobereturned.
Ifdataiscorrectlyreceived,RXPKTRDYbitofHOST_RXCSR(bit0)isset.IftheUSBperipheraldevice
respondswithaSTALL,RXSTALLbit(bit6ofHOST_RXCSR)isset.IfaNAKisreceived,thecontroller
triesagainandcontinuestotryuntileitherthetransactionissuccessfulorthePOLINTVL_NAKLIMITset
intheHOST_RXINTERVALregisterisreached.Ifnoresponseatallisreceived,twofurtherattemptsare
madebeforethecontrollerreportsanerrorbysettingtheERRORbitofHOST_RXCSR(bit2).
Thecontrollerthengeneratestheappropriateendpointinterrupt,whereuponthesoftwareshouldreadthe
correspondingHOST_RXCSRregistertodeterminewhethertheRXPKTRDY,RXSTALL,ERRORor
DATAERR_NAKTIMEOUTbitissetandactaccordingly.IftheDATAERR_NAKTIMEOUTbitisset,the
controllercanbedirectedeithertocontinuetryingthistransaction(untilittimesoutagain)byclearingthe
DATAERR_NAKTIMEOUTbitortoabortthetransactionbyclearingREQPKTbitbeforeclearingthe
DATAERR_NAKTIMEOUTbit.
ThepacketsreceivedshouldnotexceedthesizespecifiedintheRXMAXPregister(asthisshouldbethe
valuesetinthewMaxPacketSizefieldoftheendpointdescriptorsenttothehost).
Inthegeneralcase,theapplicationsoftwarewillneedtoreadeachpacketfromtheFIFOindividually.If
largeblocksofdataarebeingtransferred,theoverheadofcallinganinterruptserviceroutinetounload
eachpacketcanbeavoidedbyusingDMA.
3.2.2.1.3ErrorHandling
IfthetargetwantstoshutdowntheBulkINpipe,itwillsendaSTALLresponsetotheINtoken.Thiswill
resultintheRXSTALLbitofHOST_RXCSR(bit6)beingset.
ABulkOUTtransactionmaybeusedtotransfernon-periodicdatafromthehosttotheUSBperipheral.
FollowingoptionalfeaturesareavailableforusewithaTxendpointusedinHostmodetotransmitthis
data:
•Doublepacketbuffering:Whenenabled,uptotwopacketscanbestoredintheFIFOawaiting
transmissiontotheperipheraldevice.DoublepacketbufferingisenabledbysettingtheDPBbitof
TXFIFOSZregister(bit4).
•DMA:IfDMAisenabledfortheendpoint,aDMArequestwillbegeneratedwhenevertheendpointis
abletoacceptanotherpacketinitsFIFO.ThisfeaturecanbeusedtoallowtheDMAcontrollertoload
packetsintotheFIFOwithoutprocessorintervention.
WhenDMAisenabledandDMAMODEbitinHOST_TXCSRregisterisset,anendpointinterruptwill
notbegeneratedforcompletionofpacketreception.Anendpointinterruptwillbegeneratedonlyinthe
errorconditions.
3.2.2.2.1Setup
BeforeinitiatinganybulkOUTtransactions:
•ThetargetfunctionaddressneedstobesetintheTXFUNCADDRregisterfortheselectedcontroller
endpoint.(TXFUNCADDRregisterisavailableforallendpointsfromEP0toEP4.)
•TheHOST_TXTYPEregisterfortheendpointthatistobeusedneedstobeprogrammedasfollows:
–OperatingspeedintheSPEEDbitfield(bits7and6).
–Set10binthePROTfieldforbulktransfer.
–EndpointNumberofthetargetdeviceinTENDPNfield.Thisistheendpointnumbercontainedin
theOUT(Tx)endpointdescriptorreturnedbythetargetdeviceduringenumeration.
•TheTXMAXPregisterforthecontrollerendpointmustbewrittenwiththemaximumpacketsize(in
bytes)forthetransfer.ThisvalueshouldbethesameasthewMaxPacketSizefieldoftheStandard
EndpointDescriptorforthetargetendpoint.
SPRUGH3–November2008UniversalSerialBus(USB)Controller53
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