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Overview: Components and Features
PmPPC7448 User’s Manual 10006757-02
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Note: GbE ports (0 and 1) are routed through the PHYs directly to connector P14. Therefore, magnetics are
required on the Rear Transition Module (RTM) or baseboard.
CPLD: The PmPPC7448 uses a Complex Programmable Logic Device (CPLD) to implement various
memory-mapped registers and to control access to the Flash, ROM socket, and enumera-
tion of Monarch/non-Monarch systems.
RTC: The real-time clock is an ST®Microelectronics M41T00 Serial Access Timekeeper®.
Development Mezzanine Card (DMC):
The DMC is a custom, optional plug-on card mounted on the back of the PmPPC7448. This
card facilitates hardware and software development. See Chapter 10.